65fe21f1c9
This commit adds support for LP5X SDRAM. BUG=b:242765117 TEST=Ran with LP5X SPDs and manually patched APCB Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: I2d3cb9c9a1523cb4c5149ede1c96a16c3991a5d0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66840 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| README | ||
| apcb_edit.py | ||
| apcb_v3_edit.py | ||
| description.md | ||
README
The necessary tools for building APCBs are not available for use by coreboot. This tool allows patching an existing APCB binary with specific SPDs and GPIO selection pins.