6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
84 lines
3 KiB
C
84 lines
3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _GALILEO_REG_ACCESS_H_
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#define _GALILEO_REG_ACCESS_H_
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#include <fsp/util.h>
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#include <reg_script.h>
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#include <soc/IntelQNCConfig.h>
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#include <soc/QuarkNcSocId.h>
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#include <soc/reg_access.h>
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enum {
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MAINBOARD_TYPE = REG_SCRIPT_TYPE_MAINBOARD_BASE,
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/* Add additional mainboard access types here*/
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};
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enum {
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GEN1_I2C_GPIO_EXP_0x20 = 0x20, /* Cypress CY8C9540A */
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GEN1_I2C_GPIO_EXP_0x21 = 0x21, /* Cypress CY8C9540A */
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GEN2_I2C_GPIO_EXP0 = 0x25, /* NXP PCAL9535A */
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GEN2_I2C_GPIO_EXP1 = 0x26, /* NXP PCAL9535A */
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GEN2_I2C_GPIO_EXP2 = 0x27, /* NXP PCAL9535A */
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GEN2_I2C_LED_PWM = 0x47, /* NXP PCAL9685 */
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};
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/* Cypress CY8C9548A registers */
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#define GEN1_GPIO_EXP_INPUT0 0x00
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#define GEN1_GPIO_EXP_INPUT1 0x01
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#define GEN1_GPIO_EXP_INPUT2 0x02
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#define GEN1_GPIO_EXP_INPUT3 0x03
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#define GEN1_GPIO_EXP_INPUT4 0x04
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#define GEN1_GPIO_EXP_INPUT5 0x05
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#define GEN1_GPIO_EXP_OUTPUT0 0x08
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#define GEN1_GPIO_EXP_OUTPUT1 0x09
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#define GEN1_GPIO_EXP_OUTPUT2 0x0a
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#define GEN1_GPIO_EXP_OUTPUT3 0x0b
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#define GEN1_GPIO_EXP_OUTPUT4 0x0c
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#define GEN1_GPIO_EXP_OUTPUT5 0x0d
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#define GEN1_GPIO_EXP_PORT_SELECT 0x18
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#define GEN1_GPIO_EXP_PORT_DIR 0x1c
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/* NXP PCAL9535A registers */
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#define GEN2_GPIO_EXP_INPUT0 0x00
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#define GEN2_GPIO_EXP_INPUT1 0x01
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#define GEN2_GPIO_EXP_OUTPUT0 0x02
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#define GEN2_GPIO_EXP_OUTPUT1 0x03
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#define GEN2_GPIO_EXP_POLARITY0 0x04
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#define GEN2_GPIO_EXP_POLARITY1 0x05
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#define GEN2_GPIO_EXP_CONFIG0 0x06
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#define GEN2_GPIO_EXP_CONFIG1 0x07
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#define GEN2_GPIO_EXP_INPUT_LATCH0 0x44
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#define GEN2_GPIO_EXP_INPUT_LATCH1 0x45
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#define GEN2_GPIO_EXP_PULL_UP_DOWN_EN0 0x46
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#define GEN2_GPIO_EXP_PULL_UP_DOWN_EN1 0x47
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#define GEN2_GPIO_EXP_PULL_UP_DOWN_SEL0 0x46
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#define GEN2_GPIO_EXP_PULL_UP_DOWN_SEL1 0x47
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#define MAINBOARD_ACCESS(cmd_, reg_, size_, mask_, value_, timeout_, reg_set_) \
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_REG_SCRIPT_ENCODE_RAW(REG_SCRIPT_COMMAND_##cmd_, MAINBOARD_TYPE, \
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size_, reg_, mask_, value_, timeout_, reg_set_)
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/* I2C chip register access macros */
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#define REG_I2C_ACCESS(cmd_, reg_, mask_, value_, timeout_, slave_addr_) \
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MAINBOARD_ACCESS(cmd_, reg_, REG_SCRIPT_SIZE_8, mask_, value_, \
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timeout_, slave_addr_)
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#define REG_I2C_READ(slave_addr_, reg_) \
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REG_I2C_ACCESS(READ, reg_, 0, 0, 0, slave_addr_)
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#define REG_I2C_WRITE(slave_addr_, reg_, value_) \
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REG_I2C_ACCESS(WRITE, reg_, 0, value_, 0, slave_addr_)
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#define REG_I2C_AND(slave_addr_, reg_, value_) \
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REG_I2C_RMW(slave_addr_, reg_, value_, 0)
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#define REG_I2C_RMW(slave_addr_, reg_, mask_, value_) \
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REG_I2C_ACCESS(RMW, reg_, mask_, value_, 0, slave_addr_)
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#define REG_I2C_RXW(slave_addr_, reg_, mask_, value_) \
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REG_I2C_ACCESS(RXW, reg_, mask_, value_, 0, slave_addr_)
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#define REG_I2C_OR(slave_addr_, reg_, value_) \
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REG_I2C_RMW(slave_addr_, reg_, 0xff, value_)
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#define REG_I2C_POLL(slave_addr_, reg_, mask_, value_, timeout_) \
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REG_I2C_ACCESS(POLL, reg_, mask_, value_, timeout_, slave_addr_)
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#define REG_I2C_XOR(slave_addr_, reg_, value_) \
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REG_I2C_RXW(slave_addr_, reg_, 0xff, value_)
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#endif /* _GALILEO_REG_ACCESS_H_ */
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