coreboot-kgpe-d16/src
Aaron Durbin 81d3a2277c baytrail: update microcode to version 313
B2 and B3 steppings are now bumped to version 313.

BUG=chrome-os-partner:22858
BRANCH=None
TEST=Built.

Change-Id: I09ae5110b66c725e959e95fc15bc85ccf371495d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170425
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4848
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-01-31 20:41:29 +01:00
..
arch x86: include optional reference code blob in cbfs 2014-01-30 05:49:47 +01:00
console Remove sprintf 2014-01-10 18:08:31 +01:00
cpu cpu/intel: allow non-packaged scoped turbo setting 2014-01-30 06:10:26 +01:00
device lib/cbfs_core.c: Supply size of file as well in cbfs_get_file_content 2014-01-12 17:41:02 +01:00
drivers spi: Add support for Winbod W25Q64DW 2014-01-28 22:24:06 +01:00
ec chromeec: allow override of i8042 interrupt 2014-01-30 05:36:33 +01:00
include x86: Add SMM helper functions to MP infrastructure 2014-01-30 06:05:38 +01:00
lib coreboot: config to cache ramstage outside CBMEM 2014-01-30 06:04:02 +01:00
mainboard AGESA boards: Clean up definition of BIOS_SIZE in platform_cfg 2014-01-29 20:06:57 +01:00
northbridge x86: add common definitions for control registers 2014-01-28 23:12:27 +01:00
soc baytrail: update microcode to version 313 2014-01-31 20:41:29 +01:00
southbridge sandy/ivy SPI: Support hardware sequencing and use with multiple chips 2014-01-23 20:42:31 +01:00
superio superio/fintek: Add initial support for Fintek F71869AD. 2014-01-27 00:13:14 +01:00
vendorcode chromeos: provide option to identify reference code blob 2014-01-30 05:26:38 +01:00
Kconfig baytrail: add initial support 2014-01-31 16:36:59 +01:00