47 lines
1.4 KiB
Makefile
47 lines
1.4 KiB
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2012 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c
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romstage-$(CONFIG_CHROMEOS) += chromeos.c
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ramstage-$(CONFIG_CHROMEOS) += chromeos.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
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## DIMM SPD for on-board memory
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SPD_BIN = $(obj)/spd.bin
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# Order of names in SPD_SOURCES is important!
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SPD_SOURCES = micron_4Gb_1600_1.35v_x16
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SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/$(f).spd.hex)
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# Include spd rom data
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$(SPD_BIN): $(SPD_DEPS)
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for f in $+; \
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do for c in $$(cat $$f | grep -v ^#); \
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do echo -e -n "\\x$$c"; \
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done; \
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done > $@
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cbfs-files-y += spd.bin
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spd.bin-file := $(SPD_BIN)
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spd.bin-type := 0xab
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spd.bin-position := 0xfffec000
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