825c78b5da
Stefan Reinauer suggested 'select UDELAY_LAPIC' did not belong in f2a85-m/Kconfig. It got there via copy-paste from thatcher/Kconfig so this commit removes the 'select UDELAY_LAPIC' from both and puts it in cpu/amd/agesa/family15tn/Kconfig Since f2a85-m is the only Thatcher board coreboot supports right now, this should not break any other boards. Change-Id: I811b579c31f8d259a237d3a6724ad3b17f3a6c3e Signed-off-by: David Hubbard <david.c.hubbard+coreboot@gmail.com> Reviewed-on: http://review.coreboot.org/3178 Reviewed-by: Peter Stuge <peter@stuge.se> Tested-by: build bot (Jenkins)
132 lines
2.6 KiB
Text
132 lines
2.6 KiB
Text
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2012 Advanced Micro Devices, Inc.
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# Copyright (C) 2012 Rudolf Marek <r.marek@assembler.cz>
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#
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if BOARD_ASUS_F2A85_M
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select ARCH_X86
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select CPU_AMD_AGESA_FAMILY15_TN
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select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN_ROOT_COMPLEX
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select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
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select SOUTHBRIDGE_AMD_AGESA_HUDSON
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_ACPI_RESUME
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select HAVE_HARD_RESET
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select LIFT_BSP_APIC_ID
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select SERIAL_CPU_INIT
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select AMDMCT
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select HAVE_ACPI_TABLES
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select SUPERIO_ITE_IT8712F
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select BOARD_ROMSIZE_KB_8192
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select GFXUMA
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choice
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prompt "DDR3 memory voltage"
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default BOARD_ASUS_F2A85_M_DDR3_VOLT_150
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config BOARD_ASUS_F2A85_M_DDR3_VOLT_135
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bool "1.35V"
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help
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Set DRR3 memory voltage to 1.35V
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config BOARD_ASUS_F2A85_M_DDR3_VOLT_150
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bool "1.50V"
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help
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Set DRR3 memory voltage to 1.50V
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config BOARD_ASUS_F2A85_M_DDR3_VOLT_165
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bool "1.65V"
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help
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Set DRR3 memory voltage to 1.65V
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endchoice
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config BOARD_ASUS_F2A85_M_DDR3_VOLT_VAL
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hex
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default 0x9e if BOARD_ASUS_F2A85_M_DDR3_VOLT_135
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default 0x0 if BOARD_ASUS_F2A85_M_DDR3_VOLT_150
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default 0x1e if BOARD_ASUS_F2A85_M_DDR3_VOLT_165
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config MAINBOARD_DIR
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string
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default asus/f2a85-m
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config APIC_ID_OFFSET
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hex
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default 0x0
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config MAINBOARD_PART_NUMBER
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string
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default "F2A85-M"
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x200000
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config MAX_CPUS
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int
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default 4
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config MAX_PHYSICAL_CPUS
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int
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default 1
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config HW_MEM_HOLE_SIZE_AUTO_INC
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bool
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default n
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config MEM_TRAIN_SEQ
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int
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default 2
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config IRQ_SLOT_COUNT
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int
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default 11
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config RAMTOP
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hex
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default 0x1000000
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config HEAP_SIZE
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hex
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default 0xc0000
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config STACK_SIZE
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hex
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default 0x10000
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config RAMBASE
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hex
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default 0x200000
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config ONBOARD_VGA_IS_PRIMARY
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bool
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default y
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config VGA_BIOS_ID
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string
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default "1002,9993"
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config HUDSON_LEGACY_FREE
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bool
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default y
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endif # BOARD_ASUS_F2A85_M
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