d046fe86d8
BUG=chrome-os-partner:34336 BRANCH=none TEST=build rush Change-Id: I9c2235ccc5571f1919dc013c62488390fe31dcbc Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7468c14842c680be81620ad3fd2ea9ae056d525f Original-Change-Id: Iaf7f70727fc914b9bb2d063c9a30ece4451d40da Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/238942 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9613 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
204 lines
6.5 KiB
C
204 lines
6.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/mmu.h>
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#include <boot/coreboot_tables.h>
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#include <device/device.h>
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#include <memrange.h>
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#include <soc/addressmap.h>
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#include <soc/clk_rst.h>
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#include <soc/clock.h>
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#include <soc/funitcfg.h>
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#include <soc/nvidia/tegra/i2c.h>
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#include <soc/nvidia/tegra/usb.h>
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#include <soc/padconfig.h>
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#include <soc/spi.h>
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#include <soc/nvidia/tegra/dc.h>
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#include <soc/display.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <delay.h>
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static const struct pad_config sdmmc3_pad[] = {
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/* MMC3(SDCARD) */
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PAD_CFG_SFIO(SDMMC3_CLK, PINMUX_INPUT_ENABLE, SDMMC3),
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PAD_CFG_SFIO(SDMMC3_CMD, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
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PAD_CFG_SFIO(SDMMC3_DAT0, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
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PAD_CFG_SFIO(SDMMC3_DAT1, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
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PAD_CFG_SFIO(SDMMC3_DAT2, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
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PAD_CFG_SFIO(SDMMC3_DAT3, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
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PAD_CFG_SFIO(SDMMC3_CLK_LB_IN, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
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PAD_CFG_SFIO(SDMMC3_CLK_LB_OUT, PINMUX_INPUT_ENABLE | PINMUX_PULL_DOWN, SDMMC3),
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/* MMC3 Card Detect pin */
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PAD_CFG_GPIO_INPUT(SDMMC3_CD_N, PINMUX_PULL_UP),
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/* Disable SD card reader power so it can be reset even on warm boot.
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Payloads must enable power before accessing SD card slots. */
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PAD_CFG_GPIO_OUT0(KB_ROW0, PINMUX_PULL_NONE),
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};
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static const struct pad_config sdmmc4_pad[] = {
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/* MMC4 (eMMC) */
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PAD_CFG_SFIO(SDMMC4_CLK, PINMUX_INPUT_ENABLE, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_CMD, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT0, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT1, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT2, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT3, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT4, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT5, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT6, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT7, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
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};
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static const struct pad_config padcfgs[] = {
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/* We pull the USB VBUS signals up but keep them as inputs since the
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* voltage source likes to drive them low on overcurrent conditions */
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PAD_CFG_GPIO_INPUT(USB_VBUS_EN0, PINMUX_PULL_UP),
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PAD_CFG_GPIO_INPUT(USB_VBUS_EN1, PINMUX_PULL_UP),
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/* backlight_vdd_gpio: P2 */
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PAD_CFG_GPIO_OUT0(DAP3_DOUT, PINMUX_PULL_NONE),
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/* backlight_en_gpio: H2 */
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PAD_CFG_GPIO_OUT0(GPIO_PH2, PINMUX_PULL_NONE),
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/* backlight_pwm: H1 */
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PAD_CFG_SFIO(GPIO_PH1, PINMUX_PULL_NONE, PWM1),
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/* DP HPD */
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PAD_CFG_SFIO(DP_HPD, PINMUX_INPUT_ENABLE, DP),
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};
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static const struct pad_config i2c1_pad[] = {
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/* GEN1 I2C */
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PAD_CFG_SFIO(GEN1_I2C_SCL, PINMUX_INPUT_ENABLE, I2C1),
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PAD_CFG_SFIO(GEN1_I2C_SDA, PINMUX_INPUT_ENABLE, I2C1),
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};
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static const struct funit_cfg funitcfgs[] = {
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FUNIT_CFG(SDMMC3, PLLP, 48000, sdmmc3_pad, ARRAY_SIZE(sdmmc3_pad)),
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FUNIT_CFG(SDMMC4, PLLP, 48000, sdmmc4_pad, ARRAY_SIZE(sdmmc4_pad)),
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FUNIT_CFG(I2C1, PLLP, 100, i2c1_pad, ARRAY_SIZE(i2c1_pad)),
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};
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static void setup_ec_spi(void)
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{
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struct tegra_spi_channel *spi;
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spi = tegra_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS);
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}
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static void setup_usb(void)
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{
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clock_enable_clear_reset(CLK_L_USBD, CLK_H_USB3, 0, 0, 0, 0);
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usb_setup_utmip((void *)TEGRA_USBD_BASE);
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usb_setup_utmip((void *)TEGRA_USB3_BASE);
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}
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static const struct pad_config i2s1_pad[] = {
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/* I2S1 */
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PAD_CFG_SFIO(DAP2_SCLK, PINMUX_INPUT_ENABLE, I2S1),
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PAD_CFG_SFIO(DAP2_FS, PINMUX_INPUT_ENABLE, I2S1),
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PAD_CFG_SFIO(DAP2_DOUT, PINMUX_INPUT_ENABLE, I2S1),
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PAD_CFG_SFIO(DAP2_DIN, PINMUX_INPUT_ENABLE | PINMUX_TRISTATE, I2S1),
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/* codec MCLK via EXTPERIPH1 */
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PAD_CFG_SFIO(DAP_MCLK1, PINMUX_PULL_NONE, EXTPERIPH1),
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};
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static const struct funit_cfg audio_funit[] = {
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/* We need 1.5MHz for I2S1. So we use CLK_M */
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FUNIT_CFG(I2S1, CLK_M, 1500, i2s1_pad, ARRAY_SIZE(i2s1_pad)),
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};
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static void configure_display_clocks(void)
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{
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u32 lclks = CLK_L_DISP1 | CLK_L_HOST1X | CLK_L_PWM;
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u32 xclks = CLK_X_DPAUX | CLK_X_SOR0;
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clock_enable_clear_reset(lclks, 0, 0, 0, 0, xclks);
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/* Give clocks time to stabilize. */
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udelay(IO_STABILIZATION_DELAY);
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}
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static int configure_display_blocks(void)
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{
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soc_configure_host1x();
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/* enable display related clocks */
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configure_display_clocks();
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return 0;
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}
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/* Audio init: clocks and enables/resets */
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static void setup_audio(void)
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{
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/*
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* External peripheral 1: audio codec (max98090) uses 12MHz CLK1
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* NOTE: We can't use a funits struct/call here because EXTPERIPH1/2/3
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* don't have BASE regs or CAR RST/ENA bits. Also, the mux setting for
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* EXTPERIPH1/DAP_MCLK1 is rolled into the I2S1 padcfg.
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*/
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clock_configure_source(extperiph1, CLK_M, 12000);
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soc_configure_funits(audio_funit, ARRAY_SIZE(audio_funit));
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clock_external_output(1); /* For external MAX98090 audio codec. */
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/*
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* Confirmed by NVIDIA hardware team, we need to take ALL audio devices
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* connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out
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* of reset and clock-enabled, otherwise reading AHUB devices (in our
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* case, I2S/APBIF/AUDIO<XBAR>) will hang.
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*/
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clock_enable_audio();
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}
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static void mainboard_init(device_t dev)
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{
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soc_configure_pads(padcfgs, ARRAY_SIZE(padcfgs));
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soc_configure_funits(funitcfgs, ARRAY_SIZE(funitcfgs));
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setup_ec_spi();
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setup_usb();
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setup_audio();
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i2c_init(I2C1_BUS); /* for max98090 codec */
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/* if panel needs to bringup */
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if (!vboot_skip_display_init())
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configure_display_blocks();
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}
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void display_startup(device_t dev)
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{
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dp_display_startup(dev);
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = &mainboard_init;
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}
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struct chip_operations mainboard_ops = {
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.name = "rush",
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.enable_dev = mainboard_enable,
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};
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