50632878bf
This is necessary because ASL Memory32Fixed values cannot contain operations, even if they can be evaluated to constants. Add a sanity check in pci_mmio_cfg.h to ensure consistency with MMCONF_BUS_NUMBER. Change-Id: I8f0b5edf166580cc12c1363d8d6b6ef0f2854be9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50033 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
151 lines
4 KiB
C
151 lines
4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _PCI_MMIO_CFG_H
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#define _PCI_MMIO_CFG_H
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#include <stdint.h>
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#include <device/mmio.h>
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#include <device/pci_type.h>
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/* By not assigning this to CONFIG_MMCONF_BASE_ADDRESS here we
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* prevent some sub-optimal constant folding. */
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extern u8 *const pci_mmconf;
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/* Using a unique datatype for MMIO writes makes the pointers to _not_
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* qualify for pointer aliasing with any other objects in memory.
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*
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* MMIO offset is a value originally derived from 'struct device *'
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* in ramstage. For the compiler to not discard this MMIO offset value
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* from CPU registers after any MMIO writes, -fstrict-aliasing has to
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* be also set for the build.
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*
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* Bottom 12 bits (4 KiB) are reserved to address the registers of a
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* single PCI function. Declare the bank as a union to avoid some casting
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* in the functions below.
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*/
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union pci_bank {
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uint8_t reg8[4096];
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uint16_t reg16[4096 / sizeof(uint16_t)];
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uint32_t reg32[4096 / sizeof(uint32_t)];
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};
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static __always_inline
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volatile union pci_bank *pcicfg(pci_devfn_t dev)
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{
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return (void *)&pci_mmconf[PCI_DEVFN_OFFSET(dev)];
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}
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static __always_inline
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uint8_t pci_mmio_read_config8(pci_devfn_t dev, uint16_t reg)
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{
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return pcicfg(dev)->reg8[reg];
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}
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static __always_inline
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uint16_t pci_mmio_read_config16(pci_devfn_t dev, uint16_t reg)
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{
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return pcicfg(dev)->reg16[reg / sizeof(uint16_t)];
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}
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static __always_inline
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uint32_t pci_mmio_read_config32(pci_devfn_t dev, uint16_t reg)
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{
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return pcicfg(dev)->reg32[reg / sizeof(uint32_t)];
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}
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static __always_inline
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void pci_mmio_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
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{
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pcicfg(dev)->reg8[reg] = value;
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}
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static __always_inline
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void pci_mmio_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
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{
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pcicfg(dev)->reg16[reg / sizeof(uint16_t)] = value;
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}
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static __always_inline
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void pci_mmio_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
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{
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pcicfg(dev)->reg32[reg / sizeof(uint32_t)] = value;
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}
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/*
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* The functions pci_mmio_config*_addr provide a way to determine the MMIO address of a PCI
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* config register. The address returned is dependent of both the MMCONF base address and the
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* assigned PCI bus number of the requested device, which both can change during the boot
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* process. Thus, the pointer returned here must not be cached!
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*/
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static __always_inline
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uint8_t *pci_mmio_config8_addr(pci_devfn_t dev, uint16_t reg)
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{
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return (uint8_t *)&pcicfg(dev)->reg8[reg];
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}
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static __always_inline
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uint16_t *pci_mmio_config16_addr(pci_devfn_t dev, uint16_t reg)
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{
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return (uint16_t *)&pcicfg(dev)->reg16[reg / sizeof(uint16_t)];
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}
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static __always_inline
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uint32_t *pci_mmio_config32_addr(pci_devfn_t dev, uint16_t reg)
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{
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return (uint32_t *)&pcicfg(dev)->reg32[reg / sizeof(uint32_t)];
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}
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#if CONFIG(MMCONF_SUPPORT)
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#if CONFIG_MMCONF_BASE_ADDRESS == 0
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#error "CONFIG_MMCONF_BASE_ADDRESS undefined!"
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#endif
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#if CONFIG_MMCONF_BUS_NUMBER * MiB != CONFIG_MMCONF_LENGTH
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#error "CONFIG_MMCONF_LENGTH does not correspond with CONFIG_MMCONF_BUS_NUMBER!"
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#endif
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/* Avoid name collisions as different stages have different signature
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* for these functions. The _s_ stands for simple, fundamental IO or
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* MMIO variant.
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*/
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static __always_inline
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uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg)
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{
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return pci_mmio_read_config8(dev, reg);
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}
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static __always_inline
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uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg)
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{
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return pci_mmio_read_config16(dev, reg);
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}
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static __always_inline
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uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg)
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{
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return pci_mmio_read_config32(dev, reg);
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}
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static __always_inline
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void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
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{
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pci_mmio_write_config8(dev, reg, value);
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}
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static __always_inline
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void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
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{
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pci_mmio_write_config16(dev, reg, value);
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}
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static __always_inline
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void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
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{
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pci_mmio_write_config32(dev, reg, value);
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}
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#endif
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#endif /* _PCI_MMIO_CFG_H */
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