coreboot-kgpe-d16/src
Angel Pons 84641c8183 nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option
The MRC will perform PCI enumeration, and if it detects a VGA device in
a PEG slot, it will disable the IGD and not reserve any memory for it.
Since the memory map is locked by the time MRC finishes, the IGD can not
be enabled afterwards. Changing this behavior requires patching the MRC.

Hiding the PEG devices from MRC allows the IGD to be used even when a
dedicated graphics card is present. However, MRC will not program the
PEG AFE settings as it should, which can cause stability problems at
higher PCIe link speeds. Thus, restrict this workaround to only run when
the HASWELL_HIDE_PEG_FROM_MRC option is enabled. This allows the IGD to
be disabled and the PEG AFE settings to be programmed when a dedicated
graphics card is to be enabled, which results in increased stability.

The most ideal way to fix this problem for good is to implement native
platform init. Native init is necessary to make Nvidia Optimus usable.

Tested on Asrock B85M Pro4, using the PEG slot with a dedicated graphics
card as well as without. Graphics in both situations function properly.

Change-Id: I4d825b1c41d8705bfafe28d8ecb0a511788901f0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45534
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-22 20:05:25 +00:00
..
acpi acpigen: Make acpigen_write_opregion() argument const 2020-10-21 22:24:27 +00:00
arch sc7180: Enable bootblock compression 2020-10-13 22:41:19 +00:00
commonlib drivers/smmstore: Implement SMMSTORE version 2 2020-10-22 12:29:47 +00:00
console src: Rename EM100Pro-specific SPI console Kconfig option 2020-10-13 08:40:52 +00:00
cpu cpu/intel/common: Fix regression 2020-10-21 17:52:24 +00:00
device device: Allow virtual/generic devices under PCI in devicetree 2020-10-21 15:35:33 +00:00
drivers drivers/smmstore: Implement SMMSTORE version 2 2020-10-22 12:29:47 +00:00
ec ec/google/chromeec: Add wrappers to get/set the voltage 2020-10-20 06:58:11 +00:00
include drivers/smmstore: Implement SMMSTORE version 2 2020-10-22 12:29:47 +00:00
lib drivers/smmstore: Implement SMMSTORE version 2 2020-10-22 12:29:47 +00:00
mainboard dedede: Create metaknight variant 2020-10-22 12:28:25 +00:00
northbridge nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC option 2020-10-22 20:05:25 +00:00
security sec/intel/txt: Only run LockConfig for LT-SX 2020-10-22 20:05:01 +00:00
soc soc/intel/xeon_sp/skx/: Clean up soc_util.c 2020-10-22 17:03:49 +00:00
southbridge sb/intel/ibexpeak: Align to coreboot's coding style 2020-10-20 11:52:16 +00:00
superio superio/nuvoton: Factor out equivalent Kconfig option 2020-10-19 07:06:20 +00:00
vendorcode volteer+vendorcode: Retrieve Cr50 version only via SPI 2020-10-19 07:03:37 +00:00
Kconfig drivers/intel/usb4: Add driver for USB4 retimer device 2020-10-19 06:51:40 +00:00