868cd71282
The romstage.c is more board related than soc specific, like setting the pwm regulators, so moving it to mainboard/gru. BRANCH=none BUG=chrome-os-partner:54819 TEST=Bootup on kevin board Change-Id: I83c6cde9f451480e47e2b4b549cedf65b345134c Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 35feeb07131a6a9de4adde035236987391833474 Original-Change-Id: If2bf245302eb4fb20bb089c1b3ffa03909722443 Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/375398 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/16367 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
37 lines
1 KiB
Makefile
37 lines
1 KiB
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright 2016 Rockchip Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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subdirs-y += sdram_params/
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bootblock-y += bootblock.c
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bootblock-y += chromeos.c
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bootblock-y += memlayout.ld
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verstage-y += chromeos.c
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verstage-y += memlayout.ld
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verstage-y += reset.c
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romstage-y += boardid.c
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romstage-y += chromeos.c
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romstage-y += memlayout.ld
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romstage-y += romstage.c
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romstage-y += sdram_configs.c
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ramstage-y += boardid.c
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ramstage-y += chromeos.c
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ramstage-y += mainboard.c
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ramstage-y += memlayout.ld
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ramstage-y += reset.c
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ramstage-y += sdram_configs.c # Needed for ram_code()
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