86bd91a69a
When across warm reset, if VDD_3V3_SD_CARD gets power-cycled but VDDIO_SDMMC3
does not, we will get ~1.5V leakage on VDD. To fix that, we reset VDDIO_SDMMC3
to 0 along with VDD_3V3_SD_CARD in Coreboot. Payloads must turn on VDDIO_SDMMC3
explicitly before accessing SD card.
Note the warnings of "VDD_SDMMC must set early" in comment seems only happens on
U-Boot and can be removed.
BUG=chrome-os-partner:27053
BRNACH=nyan
TEST=Ctrl-U to boot from SD card, login and type "reboot", then Ctrl-U to boot
again. Without this patch, system will fail in loading kernel.
Original-Change-Id: I7f85995317d18587d514ea3afcff3bfea0a33e93
Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/196961
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 2cfdb78d9dc229a3c06f19bbe137d59d923908a4)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ie7d814e0424478c35a56fbc959437ee6a555684a
Reviewed-on: http://review.coreboot.org/7866
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
106 lines
2.7 KiB
C
106 lines
2.7 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <delay.h>
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#include <device/i2c.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include "boardid.h"
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#include "pmic.h"
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enum {
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AS3722_I2C_ADDR = 0x40
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};
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struct as3722_init_reg {
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u8 reg;
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u8 val;
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u8 delay;
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};
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static struct as3722_init_reg init_list[] = {
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{AS3722_SDO0, 0x3C, 1},
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{AS3722_SDO1, 0x32, 0},
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{AS3722_LDO3, 0x59, 0},
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{AS3722_SDO2, 0x3C, 0},
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{AS3722_SDO3, 0x00, 0},
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{AS3722_SDO4, 0x00, 0},
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{AS3722_SDO5, 0x50, 0},
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{AS3722_SDO6, 0x28, 1},
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{AS3722_LDO0, 0x8A, 0},
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{AS3722_LDO1, 0x00, 0},
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{AS3722_LDO2, 0x10, 0},
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{AS3722_LDO4, 0x00, 0},
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{AS3722_LDO5, 0x00, 0},
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{AS3722_LDO6, 0x00, 0},
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{AS3722_LDO7, 0x00, 0},
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{AS3722_LDO9, 0x00, 0},
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{AS3722_LDO10, 0x00, 0},
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{AS3722_LDO11, 0x00, 1},
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};
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static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
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{
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i2c_writeb(bus, AS3722_I2C_ADDR, reg, val);
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if (do_delay)
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udelay(500);
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}
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static void pmic_slam_defaults(unsigned bus)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(init_list); i++) {
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struct as3722_init_reg *reg = &init_list[i];
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pmic_write_reg(bus, reg->reg, reg->val, reg->delay);
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}
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}
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void pmic_init(unsigned bus)
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{
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/*
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* Don't need to set up VDD_CORE - already done - by OTP
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* Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
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* Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.
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*/
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/* Restore PMIC POR defaults, in case kernel changed 'em */
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pmic_slam_defaults(bus);
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/* First set VDD_CPU to 1.2V, then enable the VDD_CPU regulator. */
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pmic_write_reg(bus, 0x00, 0x50, 1);
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/* First set VDD_GPU to 1.0V, then enable the VDD_GPU regulator. */
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pmic_write_reg(bus, 0x06, 0x28, 1);
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/*
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* First set +1.2V_GEN_AVDD to 1.2V, then enable the +1.2V_GEN_AVDD
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* regulator.
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*/
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pmic_write_reg(bus, 0x12, 0x10, 1);
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/*
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* Panel power GPIO O4. Set mode for GPIO4 (0x0c to 7), then set
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* the value (register 0x20 bit 4)
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*/
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pmic_write_reg(bus, 0x0c, 0x07, 0);
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pmic_write_reg(bus, 0x20, 0x10, 1);
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}
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