coreboot-kgpe-d16/src
Ionela Voinescu 88357548a2 imgtec/pistachio: I2C: fix base address for I2C clock setup
The base address for the I2C dividers (DIV1 and CLOCKOUT)
was erroneously set to the toplevel clock controller base
address and not to the correct peripherals clock controller
base address.

Change-Id: I66bbc1e741bcf6251babee7ddd6376d49d7cb3d1
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Reviewed-on: https://review.coreboot.org/12771
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-12-31 17:34:48 +01:00
..
acpi
arch imgtec/pistachio: Add SOC_REGISTERS memory region 2015-12-31 17:32:24 +01:00
commonlib
console src/console: Add x86 romstage spinlock option and printk spinlock support 2015-12-15 16:41:13 +01:00
cpu x86 chipsets: Link non-code flow CHIPSET_BOOTBLOCK_INCLUDE files 2015-12-30 18:34:08 +01:00
device device/pnp: Ability to set vendor specific logical device config 2015-12-29 18:17:01 +01:00
drivers drivers/xgi/common: Fix XGI_SetGroup2 2015-12-30 20:30:17 +01:00
ec ACPI: Add hack to avoid IASL warning when reading back registers 2015-12-26 20:53:49 +01:00
include imgtec/pistachio: Add SOC_REGISTERS memory region 2015-12-31 17:32:24 +01:00
lib lib: remove assets infrastructure 2015-12-10 04:44:09 +01:00
mainboard gigabyte/ga-g41m-es2l: Add mainboard 2015-12-30 22:21:01 +01:00
northbridge northbridge/intel/x4x: Native raminit 2015-12-30 22:20:47 +01:00
soc imgtec/pistachio: I2C: fix base address for I2C clock setup 2015-12-31 17:34:48 +01:00
southbridge x86 chipsets: Link non-code flow CHIPSET_BOOTBLOCK_INCLUDE files 2015-12-30 18:34:08 +01:00
superio superio/it8718f: Add missing PNP info 2015-12-30 22:00:10 +01:00
vendorcode vendorcode: google: chromeos: Remove old fmap.c file 2015-12-17 19:55:26 +01:00
Kconfig Kconfig: move fmap description file prompt into the mainboard menu 2015-12-30 20:23:20 +01:00