147f703aa9
Not very popular nor useful nowadays. Change-Id: I3dc0f7aaf188950a43f5350d3a95669fbbdcfd94 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4554 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
154 lines
5.3 KiB
Text
154 lines
5.3 KiB
Text
chip northbridge/amd/amdk8/root_complex # Root complex
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device cpu_cluster 0 on # (L)APIC cluster
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chip cpu/amd/socket_AM2 # CPU socket
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device lapic 0 on end # Local APIC of the CPU
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end
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end
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device domain 0 on # PCI domain
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subsystemid 0x1022 0x2b80 inherit
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chip northbridge/amd/amdk8 # Northbridge / RAM controller
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device pci 18.0 on # Link 0 == LDT 0
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chip southbridge/nvidia/mcp55 # Southbridge
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device pci 0.0 on end # HT
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device pci 1.0 on # LPC
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chip superio/ite/it8716f # Super I/O
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device pnp 2e.0 on # Floppy and any LDN
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# Watchdog from CLKIN (24 MHz)
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irq 0x23 = 0x11
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# Serial Flash (SPI only)
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# 0x24 = 0x1a
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.1 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.2 off # Com2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.3 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 2e.4 on # Embedded controller
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io 0x60 = 0x290
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io 0x62 = 0x230
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irq 0x70 = 9
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end
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device pnp 2e.5 on # PS/2 keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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end
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device pnp 2e.6 on # PS/2 mouse
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irq 0x70 = 12
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end
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device pnp 2e.7 on # GPIO, SPI flash
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# Pin 84 is not GP10
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irq 0x25 = 0x0
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# Pin 21 is GP26, pin 26 is GP21, pin 27 is GP20
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irq 0x26 = 0x43
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# Pin 13 is GP35
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irq 0x27 = 0x20
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# Pin 70 is not GP46
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# irq 0x28 = 0x0
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# Pin 6,3,128,127,126 is GP63,64,65,66,67
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irq 0x29 = 0x81
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# Enable FAN_CTL/FAN_TAC set to 5 (pin 21, 23),
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# enable FAN_CTL/FAN_TAC set to 4 (pin 20, 22),
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# pin 48 is PCIRST5#, pin91 is PCIRSTIN#, VIN7 is internal
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# voltage divider for VCCH5V, pin 95 is ATXPG, VIN3 is internal
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# voltage divider for VCC5V
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# irq 0x2c = 0x1f
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# Simple I/O base
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io 0x62 = 0x800
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# Serial Flash I/O (SPI only)
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io 0x64 = 0x820
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# Watchdog force timeout (parallel flash only)
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# irq 0x71 = 0x1
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# No WDT interrupt
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irq 0x72 = 0x0
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# GPIO pin set 1 disable internal pullup
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irq 0xb8 = 0x0
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# GPIO pin set 5 enable internal pullup
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irq 0xbc = 0x01
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# SIO pin set 1 alternate function
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# irq 0xc0 = 0x0
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# SIO pin set 2 mixed function
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irq 0xc1 = 0x43
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# SIO pin set 3 mixed function
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irq 0xc2 = 0x20
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# SIO pin set 4 alternate function
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# irq 0xc3 = 0x0
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# SIO pin set 1 input mode
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# irq 0xc8 = 0x0
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# SIO pin set 2 input mode
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irq 0xc9 = 0x0
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# SIO pin set 4 input mode
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# irq 0xcb = 0x0
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# Generate SMI# on EC IRQ
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# irq 0xf0 = 0x10
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# SMI# level trigger
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# irq 0xf1 = 0x40
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# HWMON alert beep pin location
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irq 0xf6 = 0x28
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end
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device pnp 2e.8 off # MIDI
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io 0x60 = 0x300
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irq 0x70 = 10
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end
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device pnp 2e.9 off # Game port
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io 0x60 = 0x220
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end
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device pnp 2e.a off end # Consumer IR
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end
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end
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device pci 1.1 on # SM 0
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chip drivers/generic/generic # DIMM 0-0-0
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device i2c 50 on end
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end
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chip drivers/generic/generic # DIMM 0-0-1
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device i2c 51 on end
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end
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chip drivers/generic/generic # DIMM 0-1-0
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device i2c 52 on end
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end
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chip drivers/generic/generic # DIMM 0-1-1
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device i2c 53 on end
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end
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end
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device pci 2.0 on end # USB 1.1
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device pci 2.1 on end # USB 2
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device pci 4.0 on end # IDE
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device pci 5.0 on end # SATA 0
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device pci 5.1 on end # SATA 1
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device pci 5.2 on end # SATA 2
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device pci 6.0 on end # PCI
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device pci 6.1 on end # AUDIO
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device pci 8.0 on end # NIC
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device pci 9.0 off end # N/A
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device pci a.0 on end # PCI E 5
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device pci b.0 on end # PCI E 4
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device pci c.0 on end # PCI E 3
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device pci d.0 on end # PCI E 2
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device pci e.0 on end # PCI E 1
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device pci f.0 on end # PCI E 0
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register "ide0_enable" = "1"
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register "sata0_enable" = "1"
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register "sata1_enable" = "1"
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# 1: SMBus under 2e.8, 2: SM0 3: SM1
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register "mac_eeprom_smbus" = "3"
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register "mac_eeprom_addr" = "0x51"
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end
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end
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device pci 18.0 on end # Link 1
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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end
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end
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end
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