coreboot-kgpe-d16/src/soc/amd/glinda/agesa_acpi.c
Martin Roth f95a11eff5 soc/amd: Add framework for Glinda SoC
This adds the initial framework for the Glinda SoC, based on what's been
done for Morgana already.

I believe that there's more that can be made common, but that work will
continue as both platforms are developed.

Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Change-Id: I43d0fdb711c441dc410a14f6bb04b808abefe920
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2022-10-25 18:18:37 +00:00

28 lines
659 B
C

/* SPDX-License-Identifier: GPL-2.0-only */
/* TODO: Make common? */
#include <acpi/acpi.h>
#include <amdblocks/acpi.h>
#include <device/device.h>
#include <FspGuids.h>
#include <soc/acpi.h>
#include <types.h>
uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
acpi_rsdp_t *rsdp)
{
acpi_ivrs_t *ivrs;
/* add ALIB SSDT from HOB */
current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current);
/* IVRS */
current = ALIGN(current, 8);
ivrs = (acpi_ivrs_t *)current;
acpi_create_ivrs(ivrs, acpi_fill_ivrs);
current += ivrs->header.length;
acpi_add_table(rsdp, ivrs);
return current;
}