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Rudolf Marek 88ebbeb7e2 AMD Fam15tn: Add IOMMU BAR allocation to northbridge
For IOMMU we need to allocate a 512 KB BAR in a non-standard
location. Use the standard allocator for that and limit the BAR
to 32-bits to be compatible with older systems.

Change-Id: I44414ce6b264b7f1c086a9b1c7ea275a0830205e
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3314
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-06-24 00:52:50 +02:00
3rdparty@ba8caa30bd Update 3rdparty mark to latest repository 2013-03-15 19:09:08 +01:00
documentation Get rid of MAXIMUM_CONSOLE_LOGLEVEL; compile all messages into the coreboot binary 2013-05-10 17:33:49 +02:00
payloads libpayload: ahci: Increase timeout for signature reading 2013-06-18 19:29:36 +02:00
src AMD Fam15tn: Add IOMMU BAR allocation to northbridge 2013-06-24 00:52:50 +02:00
util inteltool: add initial support for Nehalem 2013-06-23 23:36:03 +02:00
.gitignore add a few entries to .gitignore 2013-01-10 22:51:20 +01:00
.gitmodules gitmodules: Ignore 3rdparty in "diff family" 2013-03-16 04:07:14 +01:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING
Makefile Make: Use unaltered object list for dependency inclusion 2013-05-20 10:28:25 +02:00
Makefile.inc rmodule: add rmodules class and new type 2013-03-18 20:46:40 +01:00
README

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.