coreboot-kgpe-d16/src/mainboard/cavium/cn8100_sff_evb
Patrick Rudolph 88f81af1ef soc/cavium: Add secondary CPU support
Change-Id: I07428161615bcd3d03a3eea0df2dd813e08c8f66
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25752
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2018-07-10 07:07:09 +00:00
..
bdk_devicetree.c
board.fmd
board_info.txt
bootblock.c soc/cavium: Clean uart code 2018-07-10 07:03:56 +00:00
cn81xx-linux.dtsi
ddr4-common.dtsi
devicetree.cb
Kconfig soc/cavium: Add secondary CPU support 2018-07-10 07:07:09 +00:00
Kconfig.name
mainboard.c soc/cavium: Add secondary CPU support 2018-07-10 07:07:09 +00:00
Makefile.inc
memlayout.ld
romstage.c
sff8104-linux.dts