cdaefbbdd9
This picks up the following changes 83c44ad mendocino: Add additional SPI configs 5141d91 mendocino: Add all blobs from PI 1.0.0.1 3b29a7d cezanne: Upgrade microcode patch to 00A50F00h BUG=239072117 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I1060dc7bec8f436dccf270bc3abde75cb09bb591 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66462 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> |
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amd_blobs@83c44ad892 | ||
arm-trusted-firmware@e0a6a512b5 | ||
blobs@d55c315b61 | ||
chromeec@e486b388a7 | ||
cmocka@8931845c35 | ||
ffs@3ec70fbc45 | ||
fsp@12160fe64b | ||
intel-microcode@6c0c4691e5 | ||
intel-sec-tools@0031ac7344 | ||
libgfxinit@1b04c517b3 | ||
libhwbase@fc2102f560 | ||
opensbi@215421ca61 | ||
qc_blobs@e8efa5d98d | ||
stm@1f3258261a | ||
vboot@18cb85b52d |