897123ab2f
This adds a UART driver for the ipq8064 controller. It still does not
quite work in the receive direction - the receive FIFO returns read
data in 32 bit chunks, which means that 4 keys need to be pressed
before a character pops out of the driver (and it reports it as a
single character).
This issue is being addressed separately, the driver is being checked
in to facilitate concurrent development.
BUG=chrome-os-partner:27784, chrome-os-partner:29313
TEST=with deptcharge modifications in place, the AP148 board comes up
to the depthcharge prompt:
Starting depthcharge on storm...
Original-Change-Id: Ief2cfcca73494be5c4147881144470078adcefb8
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/202045
Original-Reviewed-by: Deepa Dinamani <deepad@codeaurora.org>
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
(cherry picked from commit 4499318fb9a4e663c504d7c41380ccf2aa89da29)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I3e07d7568c20c0e570222971ff219de3a6d9b7cc
Reviewed-on: http://review.coreboot.org/8061
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
82 lines
1.8 KiB
Text
82 lines
1.8 KiB
Text
#
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# Automatically generated make config: don't edit
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# libpayload version: 0.2.0
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# Wed Dec 31 11:36:31 2014
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#
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#
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# Generic Options
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#
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# CONFIG_LP_EXPERIMENTAL is not set
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# CONFIG_LP_OBSOLETE is not set
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# CONFIG_LP_DEVELOPER is not set
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# CONFIG_LP_CHROMEOS is not set
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#
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# Architecture Options
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#
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# CONFIG_LP_ARCH_ARM is not set
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CONFIG_LP_ARCH_X86=y
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# CONFIG_LP_MEMMAP_RAM_ONLY is not set
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# CONFIG_LP_MULTIBOOT is not set
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#
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# Standard Libraries
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#
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CONFIG_LP_LIBC=y
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CONFIG_LP_CURSES=y
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# CONFIG_LP_TINYCURSES is not set
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CONFIG_LP_PDCURSES=y
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CONFIG_LP_CBFS=y
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CONFIG_LP_LZMA=y
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#
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# Console Options
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#
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# CONFIG_LP_SKIP_CONSOLE_INIT is not set
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CONFIG_LP_CBMEM_CONSOLE=y
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CONFIG_LP_SERIAL_CONSOLE=y
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CONFIG_LP_8250_SERIAL_CONSOLE=y
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# CONFIG_LP_S5P_SERIAL_CONSOLE is not set
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# CONFIG_LP_TEGRA_SERIAL_CONSOLE is not set
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# CONFIG_LP_IPQ806X_SERIAL_CONSOLE is not set
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# CONFIG_LP_PL011_SERIAL_CONSOLE is not set
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CONFIG_LP_SERIAL_IOBASE=0x3f8
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# CONFIG_LP_SERIAL_SET_SPEED is not set
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# CONFIG_LP_SERIAL_ACS_FALLBACK is not set
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CONFIG_LP_VIDEO_CONSOLE=y
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CONFIG_LP_VGA_VIDEO_CONSOLE=y
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# CONFIG_LP_GEODELX_VIDEO_CONSOLE is not set
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CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
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CONFIG_LP_PC_KEYBOARD=y
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CONFIG_LP_PC_KEYBOARD_LAYOUT_US=y
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# CONFIG_LP_PC_KEYBOARD_LAYOUT_DE is not set
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#
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# Drivers
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#
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CONFIG_LP_PCI=y
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CONFIG_LP_NVRAM=y
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# CONFIG_LP_RTC_PORT_EXTENDED_VIA is not set
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CONFIG_LP_SPEAKER=y
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CONFIG_LP_STORAGE=y
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# CONFIG_LP_STORAGE_64BIT_LBA is not set
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CONFIG_LP_STORAGE_ATA=y
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CONFIG_LP_STORAGE_ATAPI=y
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CONFIG_LP_STORAGE_AHCI=y
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CONFIG_LP_STORAGE_AHCI_ONLY_TESTED=y
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CONFIG_LP_TIMER_RDTSC=y
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CONFIG_LP_USB=y
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CONFIG_LP_USB_UHCI=y
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CONFIG_LP_USB_OHCI=y
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CONFIG_LP_USB_EHCI=y
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CONFIG_LP_USB_XHCI=y
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CONFIG_LP_USB_HID=y
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CONFIG_LP_USB_HUB=y
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CONFIG_LP_USB_MSC=y
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CONFIG_LP_USB_GEN_HUB=y
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CONFIG_LP_USB_PCI=y
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# CONFIG_LP_BIG_ENDIAN is not set
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CONFIG_LP_LITTLE_ENDIAN=y
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CONFIG_LP_IO_ADDRESS_SPACE=y
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CONFIG_LP_ARCH_SPECIFIC_OPTIONS=y
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