coreboot-kgpe-d16/src/soc/sifive/fu540
Jonathan Neuschäfer 8ac6a19155 soc/sifive/fu540: Document #if ENV_ROMSTAGE line
Change-Id: Idcd72c558e46637b1b99e9613963436fedd4a8b9
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28699
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-26 18:52:54 +00:00
..
include/soc soc/sifive/fu540: Initialize SDRAM 2018-09-14 10:32:20 +00:00
bootblock.c
cbmem.c
clint.c soc/sifive/fu540: add CLINT support 2018-09-10 15:03:37 +00:00
clock.c soc/sifive/fu540: Document #if ENV_ROMSTAGE line 2018-09-26 18:52:54 +00:00
ddrregs.h soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization 2018-09-14 09:27:29 +00:00
Kconfig arch/riscv: provide a monotonic timer 2018-09-14 09:28:06 +00:00
Makefile.inc sifive/hifive-unleashed: enable CBMEM support 2018-09-15 13:54:57 +00:00
media.c
otp.c soc/sifive: fix compiler warning 2018-09-10 20:37:17 +00:00
regconfig-ctl.h soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization 2018-09-14 09:27:29 +00:00
regconfig-phy.h soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization 2018-09-14 09:27:29 +00:00
sdram.c soc/sifive/fu540: Remove PLL parameters from sdram.c 2018-09-26 18:52:27 +00:00
uart.c soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation 2018-09-14 10:41:49 +00:00
ux00ddr.h soc/sifive/fu540: Initialize SDRAM 2018-09-14 10:32:20 +00:00