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Taniya Das 8ad0c86da2 sc7180: clock: Add support to bump CPU levels 
Add support to configure the Silver and L3 PLLs and switch the APSS
GFMUX to use the PLL to speed up the boot cores.

Tested: CPU speed frequency validated for speed bump

Change-Id: Iafd3b618fb72e0e8cc8dd297e4a3e16b83550883
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2020-05-11 23:59:59 +00:00
..
acpi treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
arch treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
commonlib treewide: Replace BSD-3-Clause and ISC headers with SPDX headers 2020-05-11 17:12:16 +00:00
console treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
cpu treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
device treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
drivers treewide: Convert more license headers to SPDX style 2020-05-11 19:37:19 +00:00
ec treewide: Convert more license headers to SPDX style 2020-05-11 19:37:19 +00:00
include treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
lib treewide: Convert more license headers to SPDX style 2020-05-11 19:37:19 +00:00
mainboard trogdor: Latch GPIO interrupt support 2020-05-11 23:59:29 +00:00
northbridge treewide: Replace BSD-3-Clause and ISC headers with SPDX headers 2020-05-11 17:12:16 +00:00
security treewide: Convert more license headers to SPDX style 2020-05-11 19:37:19 +00:00
soc sc7180: clock: Add support to bump CPU levels 2020-05-11 23:59:59 +00:00
southbridge treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
superio treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
vendorcode treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Kconfig treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00