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Raul E Rangel 8af20c6403 grunt: use stage cache when waking from S3
BUG=b:79154155
TEST=built and tested on grunt
31 entries total:

   0:1st timestamp                                     20,917
 900:calling AmdInitReset                              87,525 (66,608)
 901:back from AmdInitReset                            98,318 (10,793)
 902:calling AmdInitEarly                              99,165 (847)
 903:back from AmdInitEarly                            139,619 (40,454)
   5:start of verified boot                            156,301 (16,682)
 503:starting to initialize TPM                        156,697 (396)
 504:finished TPM initialization                       186,107 (29,410)
 505:starting to verify keyblock/preamble (RSA)        187,316 (1,209)
 506:finished verifying keyblock/preamble (RSA)        208,000 (20,684)
 507:starting to verify body (load+SHA2+RSA)           208,108 (108)
 508:finished loading body (ignore for x86)            273,238 (65,130)
 509:finished calculating body hash (SHA2)             290,364 (17,126)
 510:finished verifying body signature (RSA)           294,236 (3,872)
 511:starting TPM PCR extend                           295,071 (835)
 512:finished TPM PCR extend                           320,512 (25,441)
 513:starting locking TPM                              320,514 (2)
 514:finished locking TPM                              332,081 (11,567)
   6:end of verified boot                              332,083 (2)
  13:starting to load romstage                         332,187 (104)
   4:end of romstage                                   395,559 (63,372)
  10:start of ramstage                                 395,999 (440)
 916:calling AmdS3LateRestore                          396,135 (136)
 917:back from AmdS3LateRestore                        428,066 (31,931)
  30:device enumeration                                428,087 (21)
  40:device configuration                              434,640 (6,553)
  50:device enable                                     438,185 (3,545)
  60:device initialization                             439,565 (1,380)
  70:device setup done                                 453,326 (13,761)
 918:calling AmdS3FinalRestore                         454,363 (1,037)
 919:back from AmdS3FinalRestore                       455,520 (1,157)
  98:ACPI wake jump                                    467,541 (12,021)

Total Time: 446,624

Change-Id: I326e81d3c987130e258c616c7c66dd82ddc0d942
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/26219
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-14 07:34:51 +00:00
3rdparty Revert "3rdparty/blobs: Update submodule marker for Intel microcode updates" 2018-05-12 20:17:02 +00:00
Documentation Dokumentation: Sphinx add RST in markdown support 2018-05-11 08:58:08 +00:00
configs configs: Add intel/harcuvar FSP 2.0 sample configuration 2017-10-04 02:56:33 +00:00
payloads cbfs: Rename CBFS_TYPE_PAYLOAD to CBFS_TYPE_SELF 2018-05-04 10:30:24 +00:00
src grunt: use stage cache when waking from S3 2018-05-14 07:34:51 +00:00
util cbmem: Sort timestamp entries 2018-05-13 10:14:35 +00:00
.checkpatch.conf .checkpatch.conf: Ignore CORRUPTED_PATCH lint 2017-10-29 10:11:58 +00:00
.clang-format clang-format: Update .clang-format to be compliant with linux kernel coding style 2018-04-23 09:26:08 +00:00
.gitignore Documentation: Add support for building with Sphinx 2018-04-26 12:25:03 +00:00
.gitmodules Set up 3rdparty/libgfxinit 2016-10-29 01:35:03 +02:00
.gitreview
COPYING
MAINTAINERS MAINTAINERS: change second PC Engines maintainer 2018-03-21 18:25:49 +00:00
Makefile Makefile: Add filelist to help 2018-01-29 15:35:11 +00:00
Makefile.inc device: Include devicetree in SMM stage 2018-02-22 09:55:19 +00:00
README README: Update requirements 2017-06-27 17:04:32 +00:00
gnat.adc gnat.adc: Do not generate assertion code for Refined_Post 2016-10-29 01:33:31 +02:00
toolchain.inc toolchain: Always use GCC for Ada sources 2017-09-23 10:57:40 +00:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * https://www.coreboot.org/Supported_Motherboards
 * https://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)
 * pkg-config
 * libssl-dev (openssl)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult https://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  https://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.