Timothy Pearson 2003844378 cpu/amd/car: Add initial Suspend to RAM (S3) support ... Romstage handoff copied from cpu/intel/haswell/romstage.c Change-Id: I1e1a67fa3c2c13cebcf8f0af318055b9d97d0a59 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11953 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2015-10-27 15:12:08 +01:00
..
allwinner	cbfs: new API and better program loading	2015-06-02 14:09:31 +02:00
amd	cpu/amd/car: Add initial Suspend to RAM (S3) support	2015-10-27 15:12:08 +01:00
armltd	vboot2: add verstage	2015-01-27 01:41:40 +01:00
dmp	x86/bootblock: Use LDFLAGS_bootblock to enable garbage collection	2015-10-07 03:08:58 +00:00
intel	cpu/intel: Move Power notification ASL code into common/acpi	2015-10-23 22:28:12 +02:00
mips	Remove address from GPLv2 headers	2015-05-21 20:50:25 +02:00
qemu-x86	qemu: initialize lapic	2015-09-14 17:23:26 +00:00
samsung/exynos5250	3rdparty: move to 3rdparty/blobs	2015-05-05 22:49:18 +02:00
ti	Remove empty lines at end of file	2015-06-08 00:55:07 +02:00
via	cpu/mtrr.h: Fix macro names for MTRR registers	2015-10-15 03:52:49 +00:00
x86	cpu/x86/mtrr: Add MTRR index and total MTRRs to error message	2015-10-15 23:31:38 +00:00
Kconfig	cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFS	2015-10-16 02:41:37 +00:00
Makefile.inc	cpu: create an empty file when no microcode files are given	2015-10-27 11:12:02 +01:00