ed6fe2f64b
Migrate duplicated enable_vmx() method from multiple CPUs to common folder. Add common virtualization option for CPUs which support it. Note that this changes the default to enable virtualization on CPUs that support it. Change-Id: Ib110bed6c9f5508e3f867dcdc6f341fc50e501d1 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/17874 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
59 lines
1.3 KiB
Text
59 lines
1.3 KiB
Text
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config CPU_INTEL_HASWELL
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bool
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if CPU_INTEL_HASWELL
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config CPU_SPECIFIC_OPTIONS
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def_bool y
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select ARCH_BOOTBLOCK_X86_32
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select ARCH_VERSTAGE_X86_32
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select ARCH_ROMSTAGE_X86_32
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select ARCH_RAMSTAGE_X86_32
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select HAVE_MONOTONIC_TIMER
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select SMP
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select MMX
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select SSE
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select SSE2
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select UDELAY_TSC
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select TSC_CONSTANT_RATE
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select SMM_TSEG
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select RELOCATABLE_MODULES
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select RELOCATABLE_RAMSTAGE
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select SUPPORT_CPU_UCODE_IN_CBFS
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#select AP_IN_SIPI_WAIT
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select TSC_SYNC_MFENCE
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select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
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select PARALLEL_CPU_INIT
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select PARALLEL_MP
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select CPU_INTEL_COMMON
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config BOOTBLOCK_CPU_INIT
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string
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default "cpu/intel/haswell/bootblock.c"
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config SMM_TSEG_SIZE
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hex
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default 0x800000
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config IED_REGION_SIZE
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hex
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default 0x400000
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config SMM_RESERVED_SIZE
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hex
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default 0x100000
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config RESET_ON_INVALID_RAMSTAGE_CACHE
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bool "Reset the system on S3 wake when ramstage cache invalid."
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default n
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depends on RELOCATABLE_RAMSTAGE
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help
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The haswell romstage code caches the loaded ramstage program
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in SMM space. On S3 wake the romstage will copy over a fresh
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ramstage that was cached in the SMM space. This option determines
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the action to take when the ramstage cache is invalid. If selected
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the system will reset otherwise the ramstage will be reloaded from
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cbfs.
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endif
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