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Simon Glass 8bfa51e4c4 acpi: Avoid freeing a device twice 
The current implementation of acpi_dp_write() frees the node after it
has written it.

If the structure contains a ACPI_DP_TYPE_CHILD then a recursive call to
acpi_dp_write() frees the child and then frees it again when returning
from the call. This results in a double free.

Split the implementation into two steps, one that ones and one that
frees. This is easier to understand and fixes the bug.

Note: This likely has no effect in coreboot since it doesn't seem to
have a proper free() implementation. But it might gain one one day.

BUG=none

Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ife3917af10bc35a3c3eee38d8292f927ef15409d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42892
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 		2020-07-01 04:52:47 +00:00
3rdparty Add qc_blobs repository 2020-06-30 08:57:03 +00:00
Documentation Doc/mb/google/dragonegg: Drop abandoned project info 2020-06-30 09:19:52 +00:00
LICENSES drivers: Use SPDX identifiers 2020-05-25 22:19:21 +00:00
configs mb/ocp/deltalake: Add OCP Delta Lake mainboard 2020-06-22 12:21:18 +00:00
payloads libpayload/cbgfx: Fix overflow in transform_vector() 2020-06-28 21:52:18 +00:00
src acpi: Avoid freeing a device twice 2020-07-01 04:52:47 +00:00
tests tests: Add some basic warnings and fix resulting issues 2020-06-12 19:40:19 +00:00
util ACPI: Drop typedef global_nvs_t 2020-06-30 09:19:10 +00:00
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Makefile crossgcc: Remove "Make" 2020-06-17 11:20:30 +00:00
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README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.