coreboot-kgpe-d16/src/mainboard/lenovo/t420/early_init.c
Patrick Georgi 6b5bc77c9b treewide: Remove "this file is part of" lines
Stefan thinks they don't add value.

Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)

The exceptions are for:
 - crossgcc (patch file)
 - gcov (imported from gcc)
 - elf.h (imported from GNU's libc)
 - nvramtool (more complicated header)

The removed lines are:
-       fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-#  This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */

Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11 17:11:40 +00:00

63 lines
1.7 KiB
C

/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <device/device.h>
static void hybrid_graphics_init(void)
{
bool peg, igd;
u32 reg32;
early_hybrid_graphics(&igd, &peg);
if (peg && igd)
return;
/* Hide disabled devices */
reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN);
reg32 &= ~(DEVEN_PEG10 | DEVEN_IGD);
if (peg)
reg32 |= DEVEN_PEG10;
if (igd)
reg32 |= DEVEN_IGD;
else
/* Disable IGD VGA decode, no GTT or GFX stolen */
pci_write_config16(PCI_DEV(0, 0, 0), GGC, 2);
pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32);
}
// OC3 set in BIOS to port 2-7, OC7 set in BIOS to port 10-13
const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 1, 0 }, /* P0: system port 4, OC0 */
{ 1, 1, 1 }, /* P1: system port 2 (EHCI debug), OC 1 */
{ 1, 1, -1 }, /* P2: HALF MINICARD (WLAN) no oc */
{ 1, 0, -1 }, /* P3: WWAN, no OC */
{ 1, 0, -1 }, /* P4: smartcard, no OC */
{ 1, 1, -1 }, /* P5: ExpressCard, no OC */
{ 0, 0, -1 }, /* P6: empty */
{ 0, 0, -1 }, /* P7: empty */
{ 1, 1, 4 }, /* P8: system port 3, OC4*/
{ 1, 1, 5 }, /* P9: system port 1 (EHCI debug), OC 5 */
{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
{ 1, 0, -1 }, /* P11: bluetooth, no OC. */
{ 1, 1, -1 }, /* P12: docking, no OC */
{ 1, 1, -1 }, /* P13: camera (LCD), no OC */
};
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
{
read_spd(&spd[0], 0x50, id_only);
read_spd(&spd[2], 0x51, id_only);
}
void mainboard_early_init(int s3resume)
{
hybrid_graphics_init();
}