c3d49984f6
Change-Id: I6e9e1dff09c08079774f7d6e60e67a12760d37b4 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/7645 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
113 lines
3.9 KiB
Makefile
113 lines
3.9 KiB
Makefile
################################################################################
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2014 The ChromiumOS Authors
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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################################################################################
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riscv_flags = -I$(src)/arch/riscv/
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riscv_asm_flags =
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################################################################################
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## bootblock
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################################################################################
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ifeq ($(CONFIG_ARCH_BOOTBLOCK_RISCV),y)
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bootblock_lds = $(src)/arch/riscv/bootblock.ld
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bootblock-y = bootblock.S stages.c
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bootblock-y += rom_media.c
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bootblock-y += \
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$(top)/src/lib/memchr.c \
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$(top)/src/lib/memcmp.c \
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$(top)/src/lib/memcpy.c \
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$(top)/src/lib/memmove.c \
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$(top)/src/lib/memset.c
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$(objcbfs)/bootblock.debug: $(src)/arch/riscv/bootblock.ld $(obj)/ldoptions $$(bootblock-objs)
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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$(CC_bootblock) $(CFLAGS_bootblock) -nostartfiles -Wl,--gc-sections -static -o $@ -L$(obj) \
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-T $(src)/arch/riscv/bootblock.ld -Wl,--start-group $(bootblock-objs) \
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$(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group
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endif
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################################################################################
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## romstage
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################################################################################
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ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y)
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romstage-y += stages.c
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romstage-y += rom_media.c
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romstage-y += \
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$(top)/src/lib/memchr.c \
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$(top)/src/lib/memcmp.c \
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$(top)/src/lib/memcpy.c \
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$(top)/src/lib/memmove.c \
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$(top)/src/lib/memset.c
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romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
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# Build the romstage
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$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/riscv/romstage.ld $(obj)/ldoptions
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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$(CC_romstage) $(CFLAGS_romstage) -nostdlib -Wl,--gc-sections -static -o $@ -L$(obj) -T $(src)/arch/riscv/romstage.ld -Wl,--start-group $(romstage-objs) -Wl,--end-group
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romstage-c-ccopts += $(riscv_flags)
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romstage-S-ccopts += $(riscv_asm_flags)
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CBFSTOOL_PRE1_OPTS = -v -m riscv -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET)
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CBFSTOOL_PRE_OPTS = -v
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endif
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################################################################################
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## ramstage
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################################################################################
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ifeq ($(CONFIG_ARCH_RAMSTAGE_RISCV),y)
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ramstage-y =
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ramstage-y += rom_media.c
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ramstage-y += stages.c
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ramstage-y += misc.c
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ramstage-y += boot.c
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ramstage-y += tables.c
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ramstage-y += \
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$(top)/src/lib/memchr.c \
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$(top)/src/lib/memcmp.c \
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$(top)/src/lib/memcpy.c \
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$(top)/src/lib/memmove.c \
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$(top)/src/lib/memset.c
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$(eval $(call create_class_compiler,rmodules,riscv))
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ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
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# Build the ramstage
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$(objcbfs)/ramstage.debug: $$(ramstage-objs) $(src)/arch/riscv/ramstage.ld $(obj)/ldoptions
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -Wl,--gc-sections -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) -Wl,--end-group -T $(src)/arch/riscv/ramstage.ld
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ramstage-c-ccopts += $(riscv_flags)
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ramstage-S-ccopts += $(riscv_asm_flags)
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endif
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