183 lines
5.6 KiB
Plaintext
183 lines
5.6 KiB
Plaintext
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com>
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* Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* ISA portions taken from QEMU acpi-dsdt.dsl.
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*/
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DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1)
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{
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#include "northbridge/amd/amdk8/util.asl"
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/* For now only define 2 power states:
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* - S0 which is fully on
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* - S5 which is soft off
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* Any others would involve declaring the wake up methods.
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*/
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
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Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
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/* Root of the bus hierarchy */
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Scope (\_SB)
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{
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/* Top PCI device */
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Device (PCI0)
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{
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Name (_HID, EisaId ("PNP0A03"))
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Name (_ADR, 0x00)
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Name (_UID, 0x00)
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Name (_BBN, 0x00)
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External (BUSN)
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External (MMIO)
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External (PCIO)
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External (SBLK)
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External (TOM1)
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External (HCLK)
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External (SBDN)
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External (HCDN)
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Method (_CRS, 0, NotSerialized)
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{
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Name (BUF0, ResourceTemplate ()
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{
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IO (Decode16,
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0x0CF8, // Address Range Minimum
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0x0CF8, // Address Range Maximum
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0x01, // Address Alignment
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0x08, // Address Length
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)
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WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, // Address Space Granularity
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0x0000, // Address Range Minimum
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0x0CF7, // Address Range Maximum
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0x0000, // Address Translation Offset
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0x0CF8, // Address Length
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,, , TypeStatic)
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})
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/* Methods bellow use SSDT to get actual MMIO regs
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The IO ports are from 0xd00, optionally an VGA,
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otherwise the info from MMIO is used.
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*/
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Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
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Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
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Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
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Return (Local3)
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}
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/* PCI Routing Table */
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Name (_PRT, Package () {
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Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x10 }, /* AGP slot, effectively */
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Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x11 },
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Package (0x04) { 0x000BFFFF, 0x00, 0x00, 0x10 }, /* Slot 0xB */
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Package (0x04) { 0x000BFFFF, 0x01, 0x00, 0x11 },
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Package (0x04) { 0x000BFFFF, 0x02, 0x00, 0x12 },
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Package (0x04) { 0x000BFFFF, 0x03, 0x00, 0x13 },
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Package (0x04) { 0x000CFFFF, 0x00, 0x00, 0x11 }, /* Slot 0xC */
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Package (0x04) { 0x000CFFFF, 0x01, 0x00, 0x12 },
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Package (0x04) { 0x000CFFFF, 0x02, 0x00, 0x13 },
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Package (0x04) { 0x000CFFFF, 0x03, 0x00, 0x10 },
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Package (0x04) { 0x000DFFFF, 0x00, 0x00, 0x12 }, /* Slot 0xD */
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Package (0x04) { 0x000DFFFF, 0x01, 0x00, 0x13 },
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Package (0x04) { 0x000DFFFF, 0x02, 0x00, 0x10 },
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Package (0x04) { 0x000DFFFF, 0x03, 0x00, 0x11 },
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Package (0x04) { 0x000EFFFF, 0x00, 0x00, 0x13 }, /* Slot 0xE */
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Package (0x04) { 0x000EFFFF, 0x01, 0x00, 0x10 },
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Package (0x04) { 0x000EFFFF, 0x02, 0x00, 0x11 },
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Package (0x04) { 0x000EFFFF, 0x03, 0x00, 0x12 },
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Package (0x04) { 0x0009FFFF, 0x00, 0x00, 0x10 }, /* Slot 0x9 */
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Package (0x04) { 0x0009FFFF, 0x01, 0x00, 0x11 },
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Package (0x04) { 0x0009FFFF, 0x02, 0x00, 0x12 },
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Package (0x04) { 0x0009FFFF, 0x03, 0x00, 0x13 },
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Package (0x04) { 0x000AFFFF, 0x00, 0x00, 0x11 }, /* Marvell 88E8001 ethernet */
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Package (0x04) { 0x000FFFFF, 0x01, 0x00, 0x14 }, /* 0xf SATA IRQ 20 */
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Package (0x04) { 0x000FFFFF, 0x00, 0x00, 0x14 }, /* 0xf Native IDE IRQ 20 */
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Package (0x04) { 0x0010FFFF, 0x00, 0x00, 0x15 }, /* USB routing */
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Package (0x04) { 0x0010FFFF, 0x01, 0x00, 0x15 },
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Package (0x04) { 0x0010FFFF, 0x02, 0x00, 0x15 },
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Package (0x04) { 0x0011FFFF, 0x02, 0x00, 0x16 } /* AC97, MC97 */
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})
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Device (ISA) {
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Name (_ADR, 0x00110000)
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/* PS/2 keyboard (seems to be important for WinXP install) */
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Device (KBD)
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{
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Name (_HID, EisaId ("PNP0303"))
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Method (_STA, 0, NotSerialized)
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{
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Return (0x0f)
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}
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Method (_CRS, 0, NotSerialized)
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{
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Name (TMP, ResourceTemplate () {
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IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
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IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
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IRQNoFlags () {1}
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})
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Return (TMP)
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}
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}
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/* PS/2 mouse */
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Device (MOU)
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{
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Name (_HID, EisaId ("PNP0F13"))
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Method (_STA, 0, NotSerialized)
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{
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Return (0x0f)
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}
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Method (_CRS, 0, NotSerialized)
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{
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Name (TMP, ResourceTemplate () {
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IRQNoFlags () {12}
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})
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Return (TMP)
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}
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}
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/* PS/2 floppy controller */
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Device (FDC0)
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{
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Name (_HID, EisaId ("PNP0700"))
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Method (_STA, 0, NotSerialized)
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{
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Return (0x0f)
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}
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Method (_CRS, 0, NotSerialized)
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{
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Name (BUF0, ResourceTemplate () {
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IO (Decode16, 0x03F2, 0x03F2, 0x00, 0x04)
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IO (Decode16, 0x03F7, 0x03F7, 0x00, 0x01)
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IRQNoFlags () {6}
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DMA (Compatibility, NotBusMaster, Transfer8) {2}
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})
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Return (BUF0)
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}
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}
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}
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/* Dummy device to hold auto generated reserved resources */
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Device(MBRS) {
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Name (_HID, EisaId ("PNP0C02"))
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Name (_UID, 0x01)
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External(_CRS) /* Resource Template in SSDT */
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}
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}
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}
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}
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