coreboot-kgpe-d16/src/mainboard/google/veyron_danger
huang lin 8eb99d0524 rockchip/rk3288: use bl_en instead lcd_bl to fill_lb_gpio
in depthcharge we will use "backlight" gpio which in lb_gpio table
to control backlight, we use lcd_bl before, but it will not meet
the backlight power sequence, so we change it to bl_en.

BUG=chrome-os-partner:37348
TEST=Boot from speedy, and backlight work well
BRANCH=None

Change-Id: I19e488c7d3f1fe5cb91f8a93fae6b848f58b36b7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: cb594ce612e1cedeabced4531fbd954f3698da98
Original-Change-Id: Ib0dac7c48bce7d0b28ec287b32d8c5bad575893f
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/259900
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9864
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22 08:41:37 +02:00
..
sdram_inf veyron: add new SDRAM configuration with ram-code 1101b 2015-04-21 08:28:22 +02:00
board.h rockchip/rk3288: use bl_en instead lcd_bl to fill_lb_gpio 2015-04-22 08:41:37 +02:00
boardid.c
bootblock.c arm(64): Globally replace writel(v, a) with write32(a, v) 2015-04-21 08:22:28 +02:00
chromeos.c
devicetree.cb
Kconfig veyron_{brain,danger}: Specify vboot romstage and ramstage indices 2015-04-21 08:20:39 +02:00
Kconfig.name kconfig: automatically include mainboards 2015-04-18 08:31:08 +02:00
mainboard.c arm(64): Globally replace writel(v, a) with write32(a, v) 2015-04-21 08:22:28 +02:00
Makefile.inc
memlayout.ld
reset.c
romstage.c arm(64): Globally replace writel(v, a) with write32(a, v) 2015-04-21 08:22:28 +02:00
sdram_configs.c veyron: add new SDRAM configuration with ram-code 1101b 2015-04-21 08:28:22 +02:00