Marshall Dawson 901cb9ca46 soc/amd/picasso: Move BERT region to cbmem ... Allocate storage for the BERT reserved memory in cbmem, and add it in response to a romstage hook. Add a Kconfig option for adjusting the size reserved. This is different from the Stoney Ridge implementation where it was intentionally oversized to ease MTRR use and to keep TSEG aligned. Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4759154d394a8f5b35c0ef0a15994bbef25492e5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38694 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-04-18 15:54:33 +00:00
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common	soc/amd/common/psp: refactor psp_print_cmd_status parameters	2020-04-16 23:17:41 +00:00
picasso	soc/amd/picasso: Move BERT region to cbmem	2020-04-18 15:54:33 +00:00
stoneyridge	acpi: Bump FADT to revision 6	2020-04-13 23:32:15 +00:00
Kconfig	soc/amd: Add picasso to Kconfig	2019-07-02 14:33:42 +00:00