913067d44f
This provides are barebones initialization for tegra132 GIC
on CPU0. It routes all interrupts to CPU0, moves them all
into group 1, and attempts to allow non-secure access for
all registers (doesn't appear to be implemented, though).
BUG=chrome-os-partner:31449
BRANCH=None
TEST=Built and booted past smp init in the kernel. Timers
appear to be flowing now since jiffies are updated.
Change-Id: Id45c13cc23e50feed3d88da13420c9eb694498a0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 81bad0a53083baa7af0f1fd5f82fef0538ee62df
Original-Change-Id: I69dd9ae53f259e876a9bc4b9d7f65330150d2990
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/212795
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8995
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
115 lines
3.7 KiB
Makefile
115 lines
3.7 KiB
Makefile
bootblock-y += bootblock.c
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bootblock-y += bootblock_asm.S
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bootblock-y += cbfs.c
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bootblock-y += timer.c
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bootblock-y += clock.c
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bootblock-y += spi.c
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bootblock-y += i2c.c
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bootblock-y += dma.c
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bootblock-y += monotonic_timer.c
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bootblock-y += padconfig.c
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bootblock-y += funitcfg.c
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bootblock-y += reset.c
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bootblock-y += ../tegra/gpio.c
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bootblock-y += ../tegra/i2c.c
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bootblock-y += ../tegra/pingroup.c
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bootblock-y += ../tegra/pinmux.c
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bootblock-y += ../tegra/apbmisc.c
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bootblock-y += ../tegra/usb.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += uart.c
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endif
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romstage-y += romstage_asm.S
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romstage-y += addressmap.c
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romstage-y += cbfs.c
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romstage-y += cbmem.c
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romstage-y += timer.c
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romstage-y += ccplex.c
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romstage-y += clock.c
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romstage-y += reset.c
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romstage-y += spi.c
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romstage-y += i2c.c
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romstage-y += i2c6.c
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romstage-y += dma.c
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romstage-y += monotonic_timer.c
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romstage-y += padconfig.c
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romstage-y += funitcfg.c
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romstage-y += romstage.c
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romstage-y += power.c
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romstage-y += sdram.c
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romstage-y += sdram_lp0.c
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romstage-y += ../tegra/gpio.c
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romstage-y += ../tegra/i2c.c
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romstage-y += ../tegra/pinmux.c
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romstage-y += ../tegra/usb.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += addressmap.c
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ramstage-y += cbfs.c
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ramstage-y += cbmem.c
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ramstage-y += timer.c
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ramstage-y += clock.c
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ramstage-y += soc.c
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ramstage-y += spi.c
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ramstage-y += i2c.c
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ramstage-y += dma.c
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ramstage-y += gic.c
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ramstage-y += monotonic_timer.c
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ramstage-y += padconfig.c
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ramstage-y += funitcfg.c
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ramstage-y += reset.c
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ramstage-y += ../tegra/apbmisc.c
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ramstage-y += ../tegra/gpio.c
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ramstage-y += ../tegra/i2c.c
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ramstage-y += ../tegra/pinmux.c
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ramstage-y += ramstage.c
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ramstage-y += mmu_operations.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += ../tegra/usb.c
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modules_arm-y += monotonic_timer.c
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VBOOT_STUB_DEPS += $(obj)/soc/nvidia/tegra132/monotonic_timer.rmodules_arm.o
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CPPFLAGS_common += -Isrc/soc/nvidia/tegra132/include/
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CBOOTIMAGE_OPTS = --soc tegra132
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# We want to grab the bootblock right before it goes into the image and wrap
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# it inside a BCT, but ideally we would do that without making special, one
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# use modifications to the main ARM Makefile. We do this in two ways. First,
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# we copy bootblock.elf to bootblock.raw.elf and allow the %.bin: %.elf
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# template rule to turn it into bootblock.raw.bin. This makes sure whatever
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# processing is supposed to happen to turn an .elf into a .bin happens.
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#
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# Second, we add our own rule for creating bootblock.bin from
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# bootblock.raw.bin which displaces the template rule. When other rules that
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# package up the image pull in bootblock.bin, it will be this wrapped version
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# instead of the raw bootblock.
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$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
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cp $< $@
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$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE)
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@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
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$(CBOOTIMAGE) -gbct $(CBOOTIMAGE_OPTS) $< $@
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BCT_BIN = $(obj)/generated/bct.bin
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BCT_WRAPPER = $(obj)/generated/bct.wrapper
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MTS_DIR = $(CONFIG_MTS_DIRECTORY)
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PREBOOT_MTS_FILE = $(MTS_DIR)/preboot_cr.bin
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) $(CBOOTIMAGE)
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echo "Version = 1;" > $(BCT_WRAPPER)
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echo "Redundancy = 1;" >> $(BCT_WRAPPER)
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echo "Bctcopy = 1;" >> $(BCT_WRAPPER)
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echo "Bctfile = $(BCT_BIN);" >> $(BCT_WRAPPER)
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echo "MtsPreboot = $(PREBOOT_MTS_FILE),0x4000f000,0x4000f000,Complete;" >> $(BCT_WRAPPER)
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echo "BootLoader = $<,$(CONFIG_BOOTBLOCK_BASE),$(CONFIG_BOOTBLOCK_BASE),Complete;" >> $(BCT_WRAPPER)
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@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
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$(CBOOTIMAGE) $(CBOOTIMAGE_OPTS) $(BCT_WRAPPER) $@
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# MTS microcode
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MTS_FILE = $(MTS_DIR)/mts_cr.bin
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MTS_FILE_CBFS = mts
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cbfs-files-y += $(MTS_FILE_CBFS)
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$(MTS_FILE_CBFS)-file := $(MTS_FILE)
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$(MTS_FILE_CBFS)-type := 0x50
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