b854ae2649
Allows to use SSE and floating point in payloads without digging to much into x86 assembly code. Tested on Lenovo T500 (Intel Core2Duo). Both floating point operation and SSE is properly working. Change-Id: I4a5fc633f158de421b70435a8bfdc0dcaa504c72 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18345 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
144 lines
3.5 KiB
ArmAsm
144 lines
3.5 KiB
ArmAsm
/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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* Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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.code32
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.global _entry
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.text
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.align 4
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/*
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* Our entry point - assume that the CPU is in 32 bit protected mode and
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* all segments are in a flat model. That's our operating mode, so we won't
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* change anything.
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*/
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_entry:
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jmp _init
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.align 4
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#define MB_MAGIC 0x1BADB002
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#define MB_FLAGS 0x00010003
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mb_header:
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.long MB_MAGIC
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.long MB_FLAGS
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.long -(MB_MAGIC + MB_FLAGS)
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.long mb_header
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.long _start
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.long _edata
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.long _end
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.long _init
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#define CB_MAGIC_VALUE 0x12345678
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#define CB_MAGIC 0x04
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#define CB_ARGV 0x08
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#define CB_ARGC 0x10
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/*
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* This function saves off the previous stack and switches us to our
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* own execution environment.
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*/
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_init:
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/* No interrupts, please. */
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cli
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/* Store EAX and EBX */
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movl %eax, loader_eax
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movl %ebx, loader_ebx
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/* Copy argv[] and argc as demanded by the Payload API,
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* see http://www.coreboot.org/Payload_API and exec.S.
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*/
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cmpl $CB_MAGIC_VALUE, CB_MAGIC(%esp)
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jne 1f
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movl CB_ARGV(%esp), %eax
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movl %eax, main_argv
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movl CB_ARGC(%esp), %eax
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movl %eax, main_argc
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1:
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/* Store current stack pointer and set up new stack. */
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movl %esp, %eax
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movl $_stack, %esp
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pushl %eax
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/* Enable special x86 functions if present. */
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pushl %eax
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pushl %ebx
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pushl %ecx
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pushl %edx
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movl $0, %eax
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cpuid
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/* Test if CPUID(eax=1) is available. */
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test %eax, %eax
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je cpuid_done
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/* Get CPU features. */
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movl $1, %eax
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cpuid
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cpuid_fpu:
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/* Test if x87 FPU is present */
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test $1, %edx
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je cpuid_sse
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fninit
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movl %cr0, %eax
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andl $0xFFFFFFFB, %eax /* clear EM */
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orl $0x00000022, %eax /* set MP, NE */
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movl %eax, %cr0
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cpuid_sse:
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/* Test if SSE is available */
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test $0x02000000, %edx
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je cpuid_done
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movl %cr4, %eax
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orl $0x00000600, %eax /* set OSFXSR, OSXMMEXCPT */
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movl %eax, %cr4
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cpuid_done:
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popl %edx
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popl %ecx
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popl %ebx
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popl %eax
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/* Let's rock. */
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call start_main
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/* %eax has the return value - pass it on unmolested */
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_leave:
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/* Restore old stack. */
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popl %esp
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/* Return to the original context. */
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ret
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