212 lines
6.6 KiB
C
212 lines
6.6 KiB
C
/*
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* This file is part of the superiotool project.
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*
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* Copyright (C) 2006 Ronald Minnich <rminnich@gmail.com>
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* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "superiotool.h"
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#define CHIP_ID_REG 0x20 /* Super I/O ID (SID) / family */
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#define CHIP_REV_REG 0x27 /* Super I/O revision ID (SRID) */
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const static struct superio_registers reg_table[] = {
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{0xd0, "PC87371", { /* From sensors-detect */
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{EOT}}},
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{0xdf, "PC97371", { /* From sensors-detect */
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{EOT}}},
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{0xe1, "PC87360", {
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{EOT}}},
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{0xe2, "PC87351", {
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{NOLDN, NULL,
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{0x20,0x21,0x22,0x23,0x24,0x27,0x2e,EOT},
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{0xe2,0x11,0xa1,0x00,MISC,NANA,RSVD,EOT}},
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{0x0, "Floppy",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
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{0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}},
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{0x1, "Parallel port",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
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{0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}},
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{0x2, "COM2",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
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{0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
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{0x3, "COM1",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
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{0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
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{0x4, "System wake-up control (SWC)",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
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{0x5, "Mouse",
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{0x30,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x0c,0x02,0x04,0x04,EOT}},
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{0x6, "Keyboard",
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
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0xf0,EOT},
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{0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,
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0x40,EOT}},
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{0x7, "GPIO",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
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{0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x00,EOT}},
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{0x8, "Fan speed control",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
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{0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,EOT}},
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{EOT}}},
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{0xe4, "PC87364", {
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{EOT}}},
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{0xe5, "PC87365", { /* SRID[7..0] == chip revision */
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{EOT}}},
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{0xe8, "PC87363", {
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{EOT}}},
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{0xe9, "PC87366", {
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{EOT}}},
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/* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */
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{0xea, "PC8739x", {
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{EOT}}},
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{0xec, "PC87591x", {
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/* SRID[7..5]: 000=PC87591E, 001=PC87591S, 100=PC87591L */
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{EOT}}},
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{0xee, "PC8741x", {
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/* SRID[7..5] is marked as "not applicable for the PC8741x". */
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{EOT}}},
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{0xf0, "PC87372", {
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{EOT}}},
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{0xf1, "PC8374L", {
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{NOLDN, NULL,
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{0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26,
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0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
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{0x00,0x00,0x00,0xf1,0x11,0x00,0x00,0x00,RSVD,0x00,
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MISC,RSVD,0x01,0x2e,RSVD,RSVD,RSVD,RSVD,RSVD,EOT}},
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{0x0, "Floppy",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf8,
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EOT},
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{0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,0x24,
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EOT}},
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{0x1, "Parallel port",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf8,EOT},
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{0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,0x07,EOT}},
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{0x2, "COM2 / IR",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
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{0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
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{0x3, "COM1",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
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{0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
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{0x4, "System wake-up control (SWC)",
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{0x30,0x50,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
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EOT},
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{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,
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EOT}},
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{0x5, "Mouse",
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{0x30,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x0c,0x02,0x04,0x04,EOT}},
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{0x6, "Keyboard",
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
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EOT},
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{0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40,
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EOT}},
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{0x7, "GPIO",
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{0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
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0xf2,0xf3,0xf8,EOT},
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{0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC,
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0x00,MISC,0x01,EOT}},
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{0x8, "Health management",
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{0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
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{0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x05,EOT}},
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{EOT}}},
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{0xf2, "PC87427", {
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/* SRID[7..5] is marked as "not applicable for the PC87427". */
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{EOT}}},
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{0xf3, "PC87373", {
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{EOT}}},
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{EOT}
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};
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static void dump_readable_pc8374l(uint16_t port)
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{
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if (!dump_readable)
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return;
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printf("Human-readable register dump:\n");
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printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n",
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regval(port, 0x21), regval(port, 0x22), regval(port, 0x23),
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regval(port, 0x24), regval(port, 0x26));
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printf("SMBUS at %02x\n", regval(port, 0x2a));
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/* Check COM1. This is all we care about at present. */
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printf("COM 1 is globally %s\n",
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regval(port, 0x26) & 8 ? "disabled" : "enabled");
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/* Select COM1. */
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regwrite(port, 0x07, 0x03);
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printf("COM 1 is locally %s\n",
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regval(port, 0x30) & 1 ? "enabled" : "disabled");
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printf
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("COM1 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
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regval(port, 0x60), regval(port, 0x61), regval(port, 0x70),
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regval(port, 0x71), regval(port, 0x74), regval(port, 0x75),
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regval(port, 0xf0));
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/* Select GPIO. */
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regwrite(port, 0x07, 0x07);
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printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
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printf
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("GPIO 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n",
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regval(port, 0x60), regval(port, 0x61), regval(port, 0x70),
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regval(port, 0x71), regval(port, 0x74), regval(port, 0x75),
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regval(port, 0xf0));
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}
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void probe_idregs_nsc(uint16_t port)
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{
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uint8_t id, rev;
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probing_for("NSC", "", port);
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outb(CHIP_ID_REG, port);
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if (inb(port) != CHIP_ID_REG) {
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if (verbose)
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printf(NOTFOUND "port=0x%02x, port+1=0x%02x\n",
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inb(port), inb(port + 1));
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return;
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}
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id = inb(port + 1);
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outb(CHIP_REV_REG, port);
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if (inb(port) != CHIP_REV_REG) {
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printf("Warning: Can't get chip revision. Setting to 0xff.\n");
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rev = 0xff;
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} else {
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rev = inb(port + 1);
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}
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if (superio_unknown(reg_table, id)) {
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if (verbose)
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printf(NOTFOUND "sid=0x%02x, srid=0x%02x\n", id, rev);
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return;
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}
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printf("Found NSC %s (sid=0x%02x, srid=0x%02x) at 0x%x\n",
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get_superio_name(reg_table, id), id, rev, port);
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chip_found = 1;
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dump_superio("NSC", reg_table, port, id);
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if (id == 0xf1)
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dump_readable_pc8374l(port);
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}
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