coreboot-kgpe-d16/payloads/libpayload/include/x86/arch
Duncan Laurie 5c25d0e8cc libpayload: x86: Add read/write{8,16,32} variants that match coreboot
Add the now coreboot standard MMIO read/write accessors that were
already defined for other architectures but not x86.

This leaves the old read/write{b,w,l} variants in place as was done
on the other architectures, presumably to support old payloads that
have not been updated.

BUG=chrome-os-partner:43072
BRANCH=none
TEST=emerge-glados libpayload
CQ-DEPEND=CL:294711

Change-Id: I5ae3d755adcef0f6ff27aaa7c35a5b12ddc32e22
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: c09dd557050e3002fa5b8504980d72d4cb79a56c
Original-Change-Id: I58d928338335d3fe4bb7fe2bdc9c2967d8689118
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/294565
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11405
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-08-28 06:46:28 +00:00
..
barrier.h libpayload: Add support for memory barriers 2015-03-19 23:24:16 +01:00
cache.h arm: Redesign, clarify and clean up cache related code 2014-11-10 21:34:49 +01:00
exception.h libpayload: Rework exception hook interface 2015-01-09 07:05:15 +01:00
io.h libpayload: x86: Add read/write{8,16,32} variants that match coreboot 2015-08-28 06:46:28 +00:00
msr.h
rdtsc.h
types.h
virtual.h