Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
68 lines
1.7 KiB
C
68 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <soc/car.h>
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#include <soc/ramstage.h>
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#include "reg_access.h"
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#include "gen1.h"
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#include "gen2.h"
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void car_mainboard_pre_console_init(void)
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{
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const struct reg_script *script;
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/* Initialize the GPIO controllers */
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if (CONFIG(GALILEO_GEN2))
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script = gen2_gpio_init;
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else
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script = gen1_gpio_init;
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reg_script_run(script);
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/* Initialize the RXD and TXD paths for UART0 */
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if (CONFIG(ENABLE_BUILTIN_HSUART0)) {
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if (CONFIG(GALILEO_GEN2))
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script = gen2_hsuart0;
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else
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script = (reg_legacy_gpio_read(
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R_QNC_GPIO_RGLVL_RESUME_WELL)
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& GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO)
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? gen1_hsuart0_0x20 : gen1_hsuart0_0x21;
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reg_script_run(script);
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}
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}
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void mainboard_gpio_i2c_init(struct device *dev)
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{
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const struct reg_script *script;
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printk(BIOS_INFO, "Galileo I2C chip initialization\n");
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/* Determine the correct script for the board */
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if (CONFIG(GALILEO_GEN2))
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script = gen2_i2c_init;
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else
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/* Determine which I2C address is in use */
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script = (reg_legacy_gpio_read(R_QNC_GPIO_RGLVL_RESUME_WELL)
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& GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO)
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? gen1_i2c_0x20_init : gen1_i2c_0x21_init;
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/* Initialize the I2C chips */
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reg_script_run(script);
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}
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void mainboard_gpio_pcie_reset(uint32_t pin_value)
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{
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uint32_t pin_number;
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uint32_t value;
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/* Determine the correct PCIe reset pin */
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if (CONFIG(GALILEO_GEN2))
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pin_number = GEN2_PCI_RESET_RESUMEWELL_GPIO;
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else
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pin_number = GEN1_PCI_RESET_RESUMEWELL_GPIO;
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/* Update the PCIe reset value */
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value = reg_legacy_gpio_read(R_QNC_GPIO_RGLVL_RESUME_WELL);
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value = (value & ~(1 << pin_number)) | ((pin_value & 1) << pin_number);
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reg_legacy_gpio_write(R_QNC_GPIO_RGLVL_RESUME_WELL, value);
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}
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