GNUBoot/coreboot-kgpe-d16
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coreboot-kgpe-d16/src/soc/qualcomm
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Taniya Das 8ad0c86da2 sc7180: clock: Add support to bump CPU levels 
Add support to configure the Silver and L3 PLLs and switch the APSS
GFMUX to use the PLL to speed up the boot cores.

Tested: CPU speed frequency validated for speed bump

Change-Id: Iafd3b618fb72e0e8cc8dd297e4a3e16b83550883
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2020-05-11 23:59:59 +00:00
..
common trogdor: QCSDI loading depends on VB2_GBB_FLAG_RUNNING_FAFT setting flag 2020-05-11 23:59:38 +00:00
ipq40xx treewide: Replace BSD-3-Clause and ISC headers with SPDX headers 2020-05-11 17:12:16 +00:00
ipq806x treewide: Replace BSD-3-Clause and ISC headers with SPDX headers 2020-05-11 17:12:16 +00:00
qcs405 treewide: Replace BSD-3-Clause and ISC headers with SPDX headers 2020-05-11 17:12:16 +00:00
sc7180 sc7180: clock: Add support to bump CPU levels 2020-05-11 23:59:59 +00:00
sdm845 treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Kconfig