0dfaf33a13
This allows factoring out the common initialization for the integrated UARTs. Change-Id: I7399a13b9280b732086c6f8e6dfd9f1207d8c8ff Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48508 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
178 lines
4.1 KiB
C
178 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpigen.h>
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#include <console/console.h>
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#include <commonlib/helpers.h>
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#include <device/mmio.h>
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#include <amdblocks/gpio_banks.h>
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#include <amdblocks/acpimmio.h>
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#include <amdblocks/aoac.h>
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#include <soc/southbridge.h>
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#include <soc/gpio.h>
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#include <soc/uart.h>
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#include <types.h>
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static const struct _uart_info {
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uintptr_t base;
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struct soc_amd_gpio mux[2];
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} uart_info[] = {
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[0] = { APU_UART0_BASE, {
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PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
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PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
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} },
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[1] = { APU_UART1_BASE, {
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PAD_NF(GPIO_143, UART1_TXD, PULL_NONE),
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PAD_NF(GPIO_141, UART1_RXD, PULL_NONE),
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} },
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[2] = { APU_UART2_BASE, {
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PAD_NF(GPIO_137, UART2_TXD, PULL_NONE),
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PAD_NF(GPIO_135, UART2_RXD, PULL_NONE),
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} },
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[3] = { APU_UART3_BASE, {
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PAD_NF(GPIO_140, UART3_TXD, PULL_NONE),
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PAD_NF(GPIO_142, UART3_RXD, PULL_NONE),
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} },
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};
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uintptr_t get_uart_base(unsigned int idx)
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{
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if (idx >= ARRAY_SIZE(uart_info))
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return 0;
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return uart_info[idx].base;
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}
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static bool get_uart_idx(uintptr_t base, unsigned int *idx)
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{
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for (unsigned int i = 0; i < ARRAY_SIZE(uart_info); i++) {
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if (base == uart_info[i].base) {
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*idx = i;
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return true;
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}
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}
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return false;
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}
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void clear_uart_legacy_config(void)
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{
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write16((void *)FCH_LEGACY_UART_DECODE, 0);
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}
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void set_uart_legacy_config(unsigned int uart_idx, unsigned int range_idx)
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{
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uint16_t uart_legacy_decode;
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uint8_t uart_map_offset;
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if (uart_idx >= ARRAY_SIZE(uart_info) || range_idx >= ARRAY_SIZE(uart_info))
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return;
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uart_legacy_decode = read16((void *)FCH_LEGACY_UART_DECODE);
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/* Map uart_idx to io range_idx */
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uart_map_offset = range_idx * FCH_LEGACY_UART_MAP_SIZE + FCH_LEGACY_UART_MAP_SHIFT;
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uart_legacy_decode &= ~(FCH_LEGACY_UART_MAP_MASK << uart_map_offset);
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uart_legacy_decode |= uart_idx << uart_map_offset;
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/* Enable io range */
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uart_legacy_decode |= 1 << range_idx;
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write16((void *)FCH_LEGACY_UART_DECODE, uart_legacy_decode);
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}
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static void enable_uart_legacy_decode(uintptr_t base)
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{
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unsigned int idx;
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const uint8_t range_idx[ARRAY_SIZE(uart_info)] = {
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FCH_LEGACY_UART_RANGE_3F8,
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FCH_LEGACY_UART_RANGE_2F8,
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FCH_LEGACY_UART_RANGE_3E8,
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FCH_LEGACY_UART_RANGE_2E8,
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};
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if (get_uart_idx(base, &idx)) {
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set_uart_legacy_config(idx, range_idx[idx]);
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}
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}
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void set_uart_config(unsigned int idx)
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{
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uint32_t uart_ctrl;
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if (idx >= ARRAY_SIZE(uart_info))
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return;
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program_gpios(uart_info[idx].mux, 2);
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if (CONFIG(AMD_SOC_UART_1_8MZ)) {
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uart_ctrl = sm_pci_read32(SMB_UART_CONFIG);
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uart_ctrl |= 1 << (SMB_UART_1_8M_SHIFT + idx);
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sm_pci_write32(SMB_UART_CONFIG, uart_ctrl);
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}
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}
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static const char *uart_acpi_name(const struct device *dev)
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{
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switch (dev->path.mmio.addr) {
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case APU_UART0_BASE:
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return "FUR0";
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case APU_UART1_BASE:
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return "FUR1";
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case APU_UART2_BASE:
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return "FUR2";
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case APU_UART3_BASE:
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return "FUR3";
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default:
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return NULL;
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}
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}
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/* Even though this is called enable, it gets called for both enabled and disabled devices. */
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static void uart_enable(struct device *dev)
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{
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unsigned int dev_id;
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switch (dev->path.mmio.addr) {
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case APU_UART0_BASE:
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dev_id = FCH_AOAC_DEV_UART0;
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break;
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case APU_UART1_BASE:
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dev_id = FCH_AOAC_DEV_UART1;
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break;
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case APU_UART2_BASE:
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dev_id = FCH_AOAC_DEV_UART2;
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break;
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case APU_UART3_BASE:
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dev_id = FCH_AOAC_DEV_UART3;
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break;
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default:
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printk(BIOS_ERR, "%s: Unknown device: %s\n", __func__, dev_path(dev));
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return;
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}
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if (dev->enabled) {
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power_on_aoac_device(dev_id);
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wait_for_aoac_enabled(dev_id);
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if (CONFIG(AMD_SOC_UART_LEGACY))
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enable_uart_legacy_decode(dev->path.mmio.addr);
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} else {
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power_off_aoac_device(dev_id);
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}
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}
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/* This gets called for both enabled and disabled devices. */
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static void uart_inject_ssdt(const struct device *dev)
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{
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acpigen_write_scope(acpi_device_path(dev));
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acpigen_write_STA(acpi_device_status(dev));
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acpigen_pop_len(); /* Scope */
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}
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struct device_operations picasso_uart_mmio_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.scan_bus = scan_static_bus,
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.acpi_name = uart_acpi_name,
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.enable = uart_enable,
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.acpi_fill_ssdt = uart_inject_ssdt,
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};
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