coreboot-kgpe-d16/src/soc/intel/common/util.h
Lee Leahy 9590992402 soc/intel/common: Use SoC specific routine to read/write MTRRs
The registers associated with the MTRRs for Quark are referenced through
a port on the host bridge.  Support the standard configurations by
providing a weak routines which just do a rdmsr/wrmsr.

Testing:
*  Edit the src/mainboard/intel/galileo/Makefile.inc file
   *  Add "select DISPLAY_MTRRS"
   *  Add "select HAVE_FSP_PDAT_FILE"
   *  Add "select HAVE_FSP_RAW_BIN"
   *  Add "select HAVE_RMU_FILE"
*  Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
*  Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
*  Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
*  Testing is successful if:
   *  The MTRRs are displayed and
   *  The message "FspTempRamExit returned successfully" is displayed

TEST=Build and run on Galileo

Change-Id: If2fea66d4b054be4555f5f172ea5945620648325
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13529
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2016-02-02 19:00:35 +01:00

33 lines
1 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _INTEL_COMMON_UTIL_H_
#define _INTEL_COMMON_UTIL_H_
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <stdint.h>
asmlinkage void soc_display_mtrrs(void);
uint32_t soc_get_variable_mtrr_count(uint64_t *msr);
#if IS_ENABLED(CONFIG_SOC_SETS_MTRRS)
msr_t soc_mtrr_read(unsigned long index);
void soc_mtrr_write(unsigned long index, msr_t msr);
#else
#define soc_mtrr_read rdmsr
#define soc_mtrr_write wrmsr
#endif /* CONFIG_SOC_SETS_MTRRS */
#endif /* _INTEL_COMMON_UTIL_H_ */