.. |
arch
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Rename coreboot_ram stage to ramstage
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2014-04-26 13:27:09 +02:00 |
console
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console: Simplify the enable rules
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2014-04-18 16:41:09 +02:00 |
cpu
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AMD: Add common header file for CAR setup
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2014-04-28 18:36:35 +02:00 |
device
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OxPCIe uart: Split PCI bridge control
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2014-04-09 11:29:45 +02:00 |
drivers
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uart8250io: Fix build with DEBUG_SMI
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2014-04-26 15:09:07 +02:00 |
ec
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ec/compal/ene932: Update to use coreboot EC-mainboard API
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2014-04-19 03:49:48 +02:00 |
include
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AMD: Add common header file for CAR setup
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2014-04-28 18:36:35 +02:00 |
lib
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Rename coreboot_ram stage to ramstage
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2014-04-26 13:27:09 +02:00 |
mainboard
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mainboard/tyan/s8226: Remove redundant sio header
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2014-04-28 19:40:23 +02:00 |
northbridge
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Rename coreboot_ram stage to ramstage
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2014-04-26 13:27:09 +02:00 |
soc
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console: Move newline translation outside console_tx_byte
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2014-04-09 13:21:25 +02:00 |
southbridge
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Rename coreboot_ram stage to ramstage
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2014-04-26 13:27:09 +02:00 |
superio
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superio/winbond/w83627dhg: Convert romstage to generic component
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2014-04-28 19:22:14 +02:00 |
vendorcode
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vendorcode/amd/agesa/fam14: Build as a static library
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2014-04-15 17:23:37 +02:00 |
Kconfig
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Rename coreboot_ram stage to ramstage
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2014-04-26 13:27:09 +02:00 |