5e9dc23120
There is one global change to pci_ids.h. The rest are changes for LX. I ran abuild and it is ok. Not all artec design changes are included as some of them would adversely affect other mainboards. Indrek will need to test. Signed-off-by: Ron Minnich Signed-off-by: Indrek Kruusa, indrek.kruusa@artecdesign.ee, artec design. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
43 lines
970 B
C
43 lines
970 B
C
#if 0
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//#include "arch/romcc_io.h"
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#include <arch/io.h>
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typedef unsigned device_t;
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#define PCI_DEV(BUS, DEV, FN) ( \
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(((BUS) & 0xFF) << 16) | \
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(((DEV) & 0x1f) << 11) | \
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(((FN) & 0x7) << 8))
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static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
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{
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unsigned addr;
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addr = dev | where;
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outl(0x80000000 | (addr & ~3), 0xCF8);
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outb(value, 0xCFC + (addr & 3));
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}
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static void pci_write_config32(device_t dev, unsigned where, unsigned value)
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{
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unsigned addr;
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addr = dev | where;
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outl(0x80000000 | (addr & ~3), 0xCF8);
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outl(value, 0xCFC);
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}
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static unsigned pci_read_config32(device_t dev, unsigned where)
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{
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unsigned addr;
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addr = dev | where;
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outl(0x80000000 | (addr & ~3), 0xCF8);
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return inl(0xCFC);
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}
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#include "../../../northbridge/amd/amdk8/reset_test.c"
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void hard_reset(void)
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{
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set_bios_reset();
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pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1);
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}
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#endif
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