5c10abeb73
Set MMCONF_BASE_ADDRESS to 0xf8000000. It was already done for some boards, but not all. The sandybridge chipset code assumes 64 pci buses behind MMCONF. Therefore, only 64MiB of physical address space is required. Increasing the address allows to use additional 128MiB of MMIO space and to use the Intel IGD and a PEG at the same time. Previously it wasn't possible to use both at the same time, as two 256MiB areas won't fit into MMIO space. Test system: * Gigabyte GA-B75M-D3H * Intel Pentium CPU G2130 * Onboard GPU Intel IvyBridge Desktop * PEG GPU AMD RV770 Change-Id: I3bf72439056c8089ada6899bb0605e5cd9d89cd6 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/14096 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
47 lines
876 B
Text
47 lines
876 B
Text
if BOARD_GOOGLE_LINK
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select SYSTEM_TYPE_LAPTOP
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select CPU_INTEL_SOCKET_RPGA989
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select NORTHBRIDGE_INTEL_IVYBRIDGE
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select SOUTHBRIDGE_INTEL_C216
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select BOARD_ROMSIZE_KB_8192
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select EC_GOOGLE_CHROMEEC
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select HAVE_ACPI_TABLES
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select HAVE_OPTION_TABLE
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select HAVE_ACPI_RESUME
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_LPC_TPM
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select SERIRQ_CONTINUOUS_MODE
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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config CHROMEOS
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select CHROMEOS_VBNV_CMOS
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select LID_SWITCH
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config MAINBOARD_DIR
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string
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default google/link
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config MAINBOARD_PART_NUMBER
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string
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default "Link"
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config MMCONF_BASE_ADDRESS
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hex
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default 0xf8000000
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config MAX_CPUS
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int
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default 8
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config VGA_BIOS_FILE
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string
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default "pci8086,0166.rom"
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config GBB_HWID
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string
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depends on CHROMEOS
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default "X86 LINK TEST 6638"
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endif # BOARD_GOOGLE_LINK
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