coreboot-kgpe-d16/src
Felix Held 9836b37793 soc/amd/stoneyridge/include/iomap: drop I2C_BUS_ADDRESS(x) macro
The I2C_BUS_ADDRESS(x) macro isn't used to iterate over the I2C
controller base addresses, so drop this and use the fixed MMIO address
for the I2C[ABCD]_BASE_ADDRESS defines instead which also allows using
those defines in the ACPI code.

TEST=Timeless build results in identical image for Google/Treeya.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Idd7484a0322dc5167cbb7fdcd9a2583f0dbed50e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58336
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-10-15 19:19:12 +00:00
..
acpi src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
arch arch/x86/smbios: Add generation of type 20 table 2021-10-15 00:18:40 +00:00
commonlib src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
console src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
cpu cpu/intel/haswell: Lock PKG_CST_CONFIG_CONTROL MSR 2021-10-15 13:43:05 +00:00
device src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
drivers drivers/pc80/tpm: Fix wrong debug message 2021-10-13 13:57:05 +00:00
ec ec/google/chromeec: Register USB-C mux operations 2021-10-06 22:20:32 +00:00
include Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" 2021-10-15 13:00:32 +00:00
lib lib/thread: Remove thread stack alignment requirement 2021-10-05 22:40:25 +00:00
mainboard mb/google/kahlee/treeya/audio: use proper I2C base address define 2021-10-15 19:18:47 +00:00
northbridge nb/intel/haswell: Add HDAU ACPI device 2021-10-13 17:47:01 +00:00
security Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" 2021-10-15 13:00:32 +00:00
soc soc/amd/stoneyridge/include/iomap: drop I2C_BUS_ADDRESS(x) macro 2021-10-15 19:19:12 +00:00
southbridge sb/intel/lynxpoint: Enable PCIe Clock PM and ASPM L1 2021-10-14 11:17:52 +00:00
superio src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
vendorcode vc/amd/fsp/cezanne: Add UPD fsp_owns_pcie_resets to FSP-M for Cezanne 2021-10-11 15:55:35 +00:00
Kconfig lib/thread: Switch to using CPU_INFO_V2 2021-10-05 22:39:16 +00:00