coreboot-kgpe-d16/src/superio/ite/it8705f
Uwe Hermann 23d1e35d4d The *_early_serial.c pre-RAM code should do just that -- enable the serial
port(s), and nothing else. The code in superio.c will initialize the
rest when RAM is available...

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-02 16:57:32 +00:00
..
chip.h Add missing #includes to some ITE Super I/O files. 2006-12-01 09:41:11 +00:00
Config.lb Various minor cosmetic changes in the ITE Super I/Os, mostly whitespace 2006-11-04 23:19:00 +00:00
it8705f.h Various minor cosmetic changes in the ITE Super I/Os, mostly whitespace 2006-11-04 23:19:00 +00:00
it8705f_early_serial.c The *_early_serial.c pre-RAM code should do just that -- enable the serial 2007-04-02 16:57:32 +00:00
superio.c Add missing #includes to some ITE Super I/O files. 2006-12-01 09:41:11 +00:00