5d7ab39024
These are generated from depthcharge's board/*/fmap.dts using the dts-to-fmd.sh script. One special case is google/veyron's chromeos.fmd, which is used for a larger set of boards - no problem since the converted fmd was the same for all of them. Set aside 128K for the bootblock on non-x86 systems (where the COREBOOT region ends up at the beginning of flash). This becomes necessary because we're working without a real cbfs master header (exists for transition only), which carved out the space for the offset. Change-Id: Ieeb33702d3e58e07e958523533f83da97237ecf1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/12715 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
28 lines
601 B
Text
28 lines
601 B
Text
FLASH@0x0 0x400000 {
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WP_RO@0x0 0x300000 {
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RO_SECTION@0x0 0x2f0000 {
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BOOTBLOCK@0 128K
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COREBOOT(CBFS)@0x20000 0x1e0000
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FMAP@0x200000 0x1000
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GBB@0x201000 0xeef00
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RO_FRID@0x2eff00 0x100
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}
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RO_VPD@0x2f0000 0x10000
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}
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RW_SECTION_A@0x300000 0x78000 {
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VBLOCK_A@0x0 0x2000
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FW_MAIN_A(CBFS)@0x2000 0x75f00
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RW_FWID_A@0x77f00 0x100
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}
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RW_SHARED@0x378000 0x4000 {
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SHARED_DATA@0x0 0x4000
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}
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RW_ELOG@0x37c000 0x4000
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RW_SECTION_B@0x380000 0x78000 {
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VBLOCK_B@0x0 0x2000
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FW_MAIN_B(CBFS)@0x2000 0x75f00
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RW_FWID_B@0x77f00 0x100
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}
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RW_VPD@0x3f8000 0x4000
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RW_NVRAM@0x3fc000 0x4000
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}
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