6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
36 lines
866 B
C
36 lines
866 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* This file is created based on Intel Tiger Lake Processor PCH Datasheet
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* Document number: 575857
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* Chapter number: 3
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*/
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#include <console/console.h>
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#include <intelblocks/p2sb.h>
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void p2sb_soc_get_sb_mask(uint32_t *ep_mask, size_t count)
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{
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uint32_t mask;
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if (count != P2SB_EP_MASK_MAX_REG) {
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printk(BIOS_ERR, "Unable to program EPMASK registers\n");
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return;
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}
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/* Remove the host accessing right to PSF register range.
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* Set p2sb PCI offset EPMASK5 [29, 28, 27, 26] to disable Sideband
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* access for PCI Root Bridge.
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*/
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mask = (1 << 29) | (1 << 28) | (1 << 27) | (1 << 26);
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ep_mask[P2SB_EP_MASK_5_REG] = mask;
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/*
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* Set p2sb PCI offset EPMASK7 [31, 30] to disable Sideband
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* access for Broadcast and Multicast.
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*/
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mask = (1 << 31) | (1 << 30);
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ep_mask[P2SB_EP_MASK_7_REG] = mask;
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}
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