Jonathan Neuschäfer 64d855dbb0 arch/riscv: Remove supervisor_trap_entry ... coreboot only maintains a single trap entry, because it only runs in machine mode. Change-Id: I7324d9c8897d5c4e9d4784e7bc2a055890eab698 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/22595 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>		2017-12-02 05:25:16 +00:00
..
include	arch/riscv: Remove the current SBI implementation	2017-12-02 05:24:32 +00:00
boot.c	riscv: Remove config string support	2017-12-02 05:25:00 +00:00
bootblock.S	riscv: get SBI calls to work	2017-01-16 00:26:08 +01:00
id.ld
id.S	src/arch/riscv/id.S: Don't hardcode the strings	2016-08-04 17:17:38 +02:00
Kconfig	riscv: Remove config string support	2017-12-02 05:25:00 +00:00
Makefile.inc	riscv: Remove config string support	2017-12-02 05:25:00 +00:00
mcall.c	arch/riscv: Remove the current SBI implementation	2017-12-02 05:24:32 +00:00
misc.c
payload.S	arch/riscv: Drop mret workaround	2017-11-07 12:29:27 +00:00
prologue.inc
stages.c	arch: remove stage_exit()	2016-02-11 23:12:06 +01:00
tables.c	lib: add common write_tables() implementation	2016-04-21 20:49:05 +02:00
trap_handler.c	riscv: Remove config string support	2017-12-02 05:25:00 +00:00
trap_util.S	arch/riscv: Remove supervisor_trap_entry	2017-12-02 05:25:16 +00:00
virtual_memory.c	arch/riscv: Remove the current SBI implementation	2017-12-02 05:24:32 +00:00