8788fd6395
ChromeEC is getting ready to bump up the hostevents and wake masks to 64-bits. The current commands to program hostevents/wake masks will still operate on 32-bits only. A new EC host command will be added to handle 64-bit hostevents/wake masks. In order to prevent individual callers in coreboot from worrying about 32-bit/64-bit, the same API provided by google/chromeec will be updated to accept 64-bit parameters and return 64-bit values. Internally, host command handlers will take care of masking these parameters/return values to appropriate 32-bit/64-bit values. BUG=b:69329196 Change-Id: If59f3f2b1a2aa5ce95883df3e72efc4a32de1190 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
84 lines
2.4 KiB
C
84 lines
2.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <boot/coreboot_tables.h>
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#include <console/console.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/ec_commands.h>
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#include <soc/cpu.h>
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#include <soc/gpio.h>
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#include <string.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <bootmode.h>
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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int count = 0;
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/* Write Protect: active low */
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gpios->gpios[count].port = EXYNOS5_GPD1;
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gpios->gpios[count].polarity = ACTIVE_LOW;
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gpios->gpios[count].value = gpio_get_value(GPIO_D16); // WP_GPIO
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strncpy((char *)gpios->gpios[count].name, "write protect",
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GPIO_MAX_NAME_LENGTH);
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count++;
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/* Recovery: active low */
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gpios->gpios[count].port = -1;
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gpios->gpios[count].polarity = ACTIVE_HIGH;
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gpios->gpios[count].value = get_recovery_mode_switch();
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strncpy((char *)gpios->gpios[count].name, "recovery",
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GPIO_MAX_NAME_LENGTH);
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count++;
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/* Lid: active high */
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gpios->gpios[count].port = EXYNOS5_GPX3;
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gpios->gpios[count].polarity = ACTIVE_HIGH;
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gpios->gpios[count].value = gpio_get_value(GPIO_X35); // LID_GPIO
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strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
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count++;
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/* Power: virtual GPIO active low */
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gpios->gpios[count].port = EXYNOS5_GPX1;
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gpios->gpios[count].polarity = ACTIVE_LOW;
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gpios->gpios[count].value =
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gpio_get_value(GPIO_X13); // POWER_GPIO
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strncpy((char *)gpios->gpios[count].name, "power",
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GPIO_MAX_NAME_LENGTH);
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count++;
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gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio));
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gpios->count = count;
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printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size);
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}
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int get_recovery_mode_switch(void)
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{
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uint64_t ec_events;
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/* The GPIO is active low. */
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if (!gpio_get_value(GPIO_Y10)) // RECMODE_GPIO
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return 1;
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ec_events = google_chromeec_get_events_b();
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return !!(ec_events &
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
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}
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int get_write_protect_state(void)
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{
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return !gpio_get_value(GPIO_D16);
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}
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