04c71deceb
In order to support wake from D3cold, most devices require extra circuitry and possibly out-of-band communications to the host. Therefore, assume that most SPI peripherals that do have wake capabilities support wake from D3hot rather than D3cold. This also allows coreboot to expose a power resource to perform power sequencing for a SPI peripheral that is intended to retain power in S3/S0ix. If support for a device with d3cold wake support is needed, it could be added in later as an option. BUG=b:187228954 TEST=compile Change-Id: I1d739b49c1a43007eb0199fe39b3b7d7375e6577 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56833 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> |
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.. | ||
acpi | ||
tpm | ||
adesto.c | ||
amic.c | ||
atmel.c | ||
bitbang.c | ||
boot_device_rw_nommap.c | ||
cbfs_spi.c | ||
eon.c | ||
flashconsole.c | ||
gigadevice.c | ||
Kconfig | ||
macronix.c | ||
Makefile.inc | ||
spansion.c | ||
spi-generic.c | ||
spi_flash.c | ||
spi_flash_internal.h | ||
spi_sdcard.c | ||
spi_winbond.h | ||
spiconsole.c | ||
sst.c | ||
stmicro.c | ||
winbond.c |