99e578e3c1
This adds a file i82801gx/bootblock_gcc.c since other targets that don't yet C_ENVIRONMENT_BOOTBLOCK still use the romcc compiled bootblock.c. Tested on Foxconn D41S. Change-Id: I7e74838b0d5e9c192082084cfd9821996f0e4c50 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30939 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
54 lines
1.4 KiB
Text
54 lines
1.4 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007-2009 coresystems GmbH
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## Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config NORTHBRIDGE_INTEL_PINEVIEW
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bool
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if NORTHBRIDGE_INTEL_PINEVIEW
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config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
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def_bool y
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select HAVE_DEBUG_RAM_SETUP
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select LAPIC_MONOTONIC_TIMER
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select VGA
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
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select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT
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select INTEL_GMA_ACPI
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select POSTCAR_STAGE
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select POSTCAR_CONSOLE
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select SMM_TSEG
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select PARALLEL_MP
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select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
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select C_ENVIRONMENT_BOOTBLOCK
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config BOOTBLOCK_NORTHBRIDGE_INIT
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string
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default "northbridge/intel/pineview/bootblock.c"
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config VGA_BIOS_ID
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string
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default "8086,a001"
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config MMCONF_BASE_ADDRESS
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hex
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default 0xe0000000
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config SMM_RESERVED_SIZE
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hex
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default 0x80000
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endif
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