coreboot-kgpe-d16/src
Vadim Bendebury 9a506d5c9a spi/tpm: Make sure AP properly syncs up with Cr50
When Cr50 TPM is being reset, it continues replying to the SPI bus
requests, sends wrong register values in response to read requests.

This patch makes sure that the TPM driver does not proceed unless
proper value is read from the TPM device identification register.

If the read value is still wrong after 10 retries taken with 10 ms
intervals, the driver gives up and declares TPM broken/unavailable.

BRANCH=cr50
BUG=b:68012381
TEST=ran a script resetting the Fizz device as soon as the "index
     0x1007 return code 0" string shows up in the AP console output.
     The script keeps rebooting the Fizz indefinitely, before this
     script Fizz would fail to read TPM properly and fall into
     recovery after no more than four reboots.

Change-Id: I7e67ec62c2bf31077b9ae558e09214d07eccf96b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/22231
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-11-01 18:02:43 +00:00
..
acpi src/acpi: Add guards on all header files 2017-08-01 23:04:27 +00:00
arch arch/x86: Restore forwarding table on resume for non EARLY_EBDA_INIT 2017-10-29 01:59:18 +00:00
commonlib LB_TAGS: change the value of CB_TAG_MAC_ADDRS to 0x33 2017-10-29 18:07:51 +00:00
console console: Ignore loglevel in nvram until ramstage 2017-09-25 13:35:29 +00:00
cpu AMD boards: Fix function name (soft_reset) in message 2017-10-31 09:57:06 +00:00
device security/vboot: Move vboot2 to security kconfig section 2017-10-22 02:14:46 +00:00
drivers spi/tpm: Make sure AP properly syncs up with Cr50 2017-11-01 18:02:43 +00:00
ec security/vboot: Move vboot2 to security kconfig section 2017-10-22 02:14:46 +00:00
include intel/common/smbus: increase spd read performance 2017-10-31 15:49:55 +00:00
lib intel/common/smbus: increase spd read performance 2017-10-31 15:49:55 +00:00
mainboard google/fizz: enable SPD read by word 2017-11-01 16:27:24 +00:00
northbridge nb/intel/i3100: Don't select UDELAY_IO 2017-10-29 14:16:13 +00:00
security security/vboot: Move vboot2 to security kconfig section 2017-10-22 02:14:46 +00:00
soc soc/intel/cannonlake: Use SCS common code 2017-11-01 17:42:30 +00:00
southbridge AMD boards: Fix function name (soft_reset) in message 2017-10-31 09:57:06 +00:00
superio superio/acpi/pnp.asl: Fix PNP_READ_DMA/PNP_WRITE_DMA macros 2017-10-25 14:32:39 +00:00
vendorcode security/vboot: Move vboot2 to security kconfig section 2017-10-22 02:14:46 +00:00
Kconfig intel/common/smbus: increase spd read performance 2017-10-31 15:49:55 +00:00