192 lines
6.0 KiB
C
192 lines
6.0 KiB
C
/* inteltool - dump all registers on an Intel CPU + chipset based system */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <stdio.h>
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#include <stdlib.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <assert.h>
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#include <inttypes.h>
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#include "inteltool.h"
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#include "pcr.h"
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#include "gpio_names/apollolake.h"
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#include "gpio_names/cannonlake.h"
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#include "gpio_names/cannonlake_lp.h"
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#include "gpio_names/denverton.h"
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#include "gpio_names/icelake.h"
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#include "gpio_names/lewisburg.h"
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#include "gpio_names/sunrise.h"
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#define SBBAR_SIZE (16 * MiB)
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#define PCR_PORT_SIZE (64 * KiB)
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static const char *decode_pad_mode(const struct gpio_group *const group,
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const size_t pad, const uint32_t dw0)
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{
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const size_t pad_mode = dw0 >> 10 & 7;
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const char *const pad_name =
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group->pad_names[pad * group->func_count + pad_mode];
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if (!pad_mode)
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return pad_name[0] == '*' ? "*GPIO" : "GPIO";
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else if (pad_mode < group->func_count)
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return group->pad_names[pad * group->func_count + pad_mode];
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else
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return "RESERVED";
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}
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static void print_gpio_group(const uint8_t pid, size_t pad_cfg,
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const struct gpio_group *const group,
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size_t pad_stepping)
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{
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size_t p;
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printf("%s\n", group->display);
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for (p = 0; p < group->pad_count; ++p, pad_cfg += pad_stepping) {
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const uint32_t dw0 = read_pcr32(pid, pad_cfg);
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const uint32_t dw1 = read_pcr32(pid, pad_cfg + 4);
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const char *const pad_name =
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group->pad_names[p * group->func_count];
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printf("0x%04zx: 0x%016"PRIx64" %-12s %-20s\n", pad_cfg,
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(uint64_t)dw1 << 32 | dw0,
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pad_name[0] == '*' ? &pad_name[1] : pad_name,
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decode_pad_mode(group, p, dw0));
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}
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}
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static void print_gpio_community(const struct gpio_community *const community,
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size_t pad_stepping)
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{
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size_t group, pad_count;
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size_t pad_cfg; /* offset in bytes under this communities PCR port */
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printf("%s\n\nPCR Port ID: 0x%06zx\n\n",
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community->name, (size_t)community->pcr_port_id << 16);
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for (group = 0, pad_count = 0; group < community->group_count; ++group)
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pad_count += community->groups[group]->pad_count;
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assert(pad_count * 8 <= PCR_PORT_SIZE - 0x10);
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pad_cfg = read_pcr32(community->pcr_port_id, 0x0c);
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if (pad_cfg + pad_count * 8 > PCR_PORT_SIZE) {
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fprintf(stderr, "Bad Pad Base Address: 0x%08zx\n", pad_cfg);
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return;
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}
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for (group = 0; group < community->group_count; ++group) {
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print_gpio_group(community->pcr_port_id,
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pad_cfg, community->groups[group],
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pad_stepping);
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pad_cfg += community->groups[group]->pad_count * pad_stepping;
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}
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}
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const struct gpio_community *const *get_gpio_communities(struct pci_dev *const sb,
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size_t* community_count,
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size_t* pad_stepping)
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{
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*pad_stepping = 8;
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switch (sb->device_id) {
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case PCI_DEVICE_ID_INTEL_H110:
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case PCI_DEVICE_ID_INTEL_H170:
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case PCI_DEVICE_ID_INTEL_Z170:
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case PCI_DEVICE_ID_INTEL_Q170:
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case PCI_DEVICE_ID_INTEL_Q150:
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case PCI_DEVICE_ID_INTEL_B150:
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case PCI_DEVICE_ID_INTEL_C236:
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case PCI_DEVICE_ID_INTEL_C232:
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case PCI_DEVICE_ID_INTEL_QM170:
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case PCI_DEVICE_ID_INTEL_HM170:
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case PCI_DEVICE_ID_INTEL_CM236:
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*community_count = ARRAY_SIZE(sunrise_communities);
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return sunrise_communities;
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE:
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL:
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL:
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL:
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL:
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL:
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL:
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE:
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM:
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case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM:
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*community_count = ARRAY_SIZE(sunrise_lp_communities);
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return sunrise_lp_communities;
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case PCI_DEVICE_ID_INTEL_C621:
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case PCI_DEVICE_ID_INTEL_C622:
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case PCI_DEVICE_ID_INTEL_C624:
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case PCI_DEVICE_ID_INTEL_C625:
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case PCI_DEVICE_ID_INTEL_C626:
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case PCI_DEVICE_ID_INTEL_C627:
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case PCI_DEVICE_ID_INTEL_C628:
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case PCI_DEVICE_ID_INTEL_C629:
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case PCI_DEVICE_ID_INTEL_C621A:
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case PCI_DEVICE_ID_INTEL_C627A:
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case PCI_DEVICE_ID_INTEL_C629A:
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case PCI_DEVICE_ID_INTEL_C624_SUPER:
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case PCI_DEVICE_ID_INTEL_C627_SUPER_1:
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case PCI_DEVICE_ID_INTEL_C621_SUPER:
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case PCI_DEVICE_ID_INTEL_C627_SUPER_2:
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case PCI_DEVICE_ID_INTEL_C628_SUPER:
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case PCI_DEVICE_ID_INTEL_C621A_SUPER:
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case PCI_DEVICE_ID_INTEL_C627A_SUPER:
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case PCI_DEVICE_ID_INTEL_C629A_SUPER:
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*community_count = ARRAY_SIZE(lewisburg_communities);
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return lewisburg_communities;
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case PCI_DEVICE_ID_INTEL_DNV_LPC:
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*community_count = ARRAY_SIZE(denverton_communities);
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return denverton_communities;
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case PCI_DEVICE_ID_INTEL_APL_LPC:
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*community_count = ARRAY_SIZE(apl_communities);
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return apl_communities;
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case PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM:
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case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_PREM:
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case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_BASE:
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*community_count = ARRAY_SIZE(cannonlake_pch_lp_communities);
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*pad_stepping = 16;
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return cannonlake_pch_lp_communities;
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case PCI_DEVICE_ID_INTEL_H310:
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case PCI_DEVICE_ID_INTEL_H370:
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case PCI_DEVICE_ID_INTEL_Z390:
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case PCI_DEVICE_ID_INTEL_Q370:
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case PCI_DEVICE_ID_INTEL_B360:
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case PCI_DEVICE_ID_INTEL_C246:
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case PCI_DEVICE_ID_INTEL_C242:
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case PCI_DEVICE_ID_INTEL_QM370:
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case PCI_DEVICE_ID_INTEL_HM370:
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case PCI_DEVICE_ID_INTEL_CM246:
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*community_count = ARRAY_SIZE(cannonlake_pch_h_communities);
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*pad_stepping = 16;
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return cannonlake_pch_h_communities;
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case PCI_DEVICE_ID_INTEL_ICELAKE_LP_U:
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*community_count = ARRAY_SIZE(icelake_pch_h_communities);
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*pad_stepping = 16;
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return icelake_pch_h_communities;
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default:
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return NULL;
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}
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}
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void print_gpio_groups(struct pci_dev *const sb)
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{
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size_t community_count;
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const struct gpio_community *const *communities;
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size_t pad_stepping;
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communities = get_gpio_communities(sb, &community_count, &pad_stepping);
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if (!communities)
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return;
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pcr_init(sb);
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printf("\n============= GPIOS =============\n\n");
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for (; community_count; --community_count)
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print_gpio_community(*communities++, pad_stepping);
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}
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