coreboot-kgpe-d16/src/cpu/x86/mtrr
Aaron Durbin 9b027fe5b0 mtrr: honor IORESOURCE_WRCOMB
All resources that set the IORESOURCE_WRCOMB attribute which are
also marked as IORESOURCE_PREFETCH will have a MTRR set up that
is of the write-combining cacheable type. The only resources on
x86 that can be set to write-combining are prefetchable ones.

Change-Id: Iba7452cff3677e07d7e263b79982a49c93be9c54
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2892
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-29 19:57:31 +01:00
..
earlymtrr.c Rename cache_lbmem() to cache_ramstage() 2012-07-24 23:30:00 +02:00
Makefile.inc Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
mtrr.c mtrr: honor IORESOURCE_WRCOMB 2013-03-29 19:57:31 +01:00